On Fri, Apr 24, 2020 at 04:14:23PM -0700, Matt Roper wrote:
> The IRQ postinstall handling had open-coded pipe fault mask selection
> that never got updated for gen11. Switch it to use
> gen8_de_pipe_fault_mask() to ensure we don't miss updates for new
> platforms.
>
> Cc: José Roberto de Souza <jose.so...@intel.com>
> Fixes: d506a65d56fd ("drm/i915: Catch GTT fault errors for gen11+ planes")
> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1502ab44f1a5..bd722d0650c8 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3358,7 +3358,8 @@ static void gen8_de_irq_postinstall(struct
> drm_i915_private *dev_priv)
> {
> struct intel_uncore *uncore = &dev_priv->uncore;
>
> - u32 de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
> + u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
> + GEN8_PIPE_CDCLK_CRC_DONE;
> u32 de_pipe_enables;
> u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> u32 de_port_enables;
> @@ -3369,13 +3370,10 @@ static void gen8_de_irq_postinstall(struct
> drm_i915_private *dev_priv)
> de_misc_masked |= GEN8_DE_MISC_GSE;
>
> if (INTEL_GEN(dev_priv) >= 9) {
> - de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
> de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
> GEN9_AUX_CHANNEL_D;
> if (IS_GEN9_LP(dev_priv))
> de_port_masked |= BXT_DE_PORT_GMBUS;
> - } else {
> - de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
> }
>
> if (INTEL_GEN(dev_priv) >= 11)
> --
> 2.24.1
>
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--
Ville Syrjälä
Intel
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