On Thu, Jul 04, 2013 at 12:01:15PM +0200, Daniel Vetter wrote: > This makes sparse happy and also makes it a bit more obvious where we > pull off this trick - after all we're only allowed to do it eithe as a > default or on platforms where there is no disdinction between the pipe > and the cpu transcoder. > > Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
For both patches: Reviewed-by: Damien Lespiau <damien.lesp...@intel.com> -- Damien > --- > drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 8b48a72..745631f 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4935,7 +4935,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc > *crtc, > struct drm_i915_private *dev_priv = dev->dev_private; > uint32_t tmp; > > - pipe_config->cpu_transcoder = crtc->pipe; > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > pipe_config->shared_dpll = DPLL_ID_PRIVATE; > > tmp = I915_READ(PIPECONF(crtc->pipe)); > @@ -5806,7 +5806,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc > *crtc, > struct drm_i915_private *dev_priv = dev->dev_private; > uint32_t tmp; > > - pipe_config->cpu_transcoder = crtc->pipe; > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > pipe_config->shared_dpll = DPLL_ID_PRIVATE; > > tmp = I915_READ(PIPECONF(crtc->pipe)); > @@ -5922,7 +5922,7 @@ static bool haswell_get_pipe_config(struct intel_crtc > *crtc, > enum intel_display_power_domain pfit_domain; > uint32_t tmp; > > - pipe_config->cpu_transcoder = crtc->pipe; > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > pipe_config->shared_dpll = DPLL_ID_PRIVATE; > > tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)); > @@ -7020,7 +7020,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct > drm_device *dev, > * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need > * to use a real value here instead. > */ > - pipe_config.cpu_transcoder = intel_crtc->pipe; > + pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe; > pipe_config.pixel_multiplier = 1; > i9xx_crtc_clock_get(intel_crtc, &pipe_config); > > @@ -7850,7 +7850,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc, > > drm_mode_copy(&pipe_config->adjusted_mode, mode); > drm_mode_copy(&pipe_config->requested_mode, mode); > - pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe; > + pipe_config->cpu_transcoder = > + (enum transcoder) to_intel_crtc(crtc)->pipe; > pipe_config->shared_dpll = DPLL_ID_PRIVATE; > > /* Compute a starting value for pipe_config->pipe_bpp taking the source > -- > 1.7.11.7 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
