In continuing to make default context/aliasing PPGTT behave like any
other context/PPGTT pair this patch sets us up by moving the
context/PPGTT init to a common location.
The resulting code isn't a huge improvement, but that will change in the
next patch (at least a bit).
In the process of doing this, make the ppgtt init function a bit more
generic
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_drv.h | 4 +--
drivers/gpu/drm/i915/i915_gem.c | 36 ++++++++++++++++++---
drivers/gpu/drm/i915/i915_gem_gtt.c | 63 +++++++++----------------------------
3 files changed, 48 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7c3ba90..1500fe4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1839,20 +1839,20 @@ int i915_gem_context_destroy_ioctl(struct drm_device
*dev, void *data,
struct drm_file *file);
/* i915_gem_gtt.c */
+bool intel_enable_ppgtt(struct drm_device *dev);
+int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev);
void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level);
void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,
struct drm_i915_gem_object *obj);
-
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level);
void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);
-void i915_gem_init_global_gtt(struct drm_device *dev);
void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start,
unsigned long mappable_end, unsigned long end,
unsigned long guard_size);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 64f8087..4f46cf8 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4209,7 +4209,7 @@ i915_gem_init_hw(struct drm_device *dev)
int i915_gem_init(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- int ret;
+ int ret = -ENODEV;
mutex_lock(&dev->struct_mutex);
@@ -4220,16 +4220,42 @@ int i915_gem_init(struct drm_device *dev)
DRM_DEBUG_DRIVER("allow wake ack timed out\n");
}
- i915_gem_init_global_gtt(dev);
+ if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
+ struct i915_hw_ppgtt *ppgtt;
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
+ goto ggtt_only;
+
+
+ i915_gem_setup_global_gtt(dev, 0, dev_priv->gtt.mappable_end,
+ dev_priv->gtt.total, 0);
+ i915_gem_context_init(dev);
+ ret = i915_gem_ppgtt_init(dev, ppgtt);
+ if (ret) {
+ kfree(ppgtt);
+ drm_mm_takedown(&dev_priv->mm.gtt_space);
+ goto ggtt_only;
+ }
- i915_gem_context_init(dev);
+ dev_priv->mm.aliasing_ppgtt = ppgtt;
+ }
+
+ggtt_only:
+ if (ret) {
+ if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev))
+ DRM_DEBUG_DRIVER("Aliased PPGTT setup fail %d\n", ret);
+ i915_gem_setup_global_gtt(dev, 0, dev_priv->gtt.mappable_end,
+ dev_priv->gtt.total, PAGE_SIZE);
+ }
ret = i915_gem_init_hw(dev);
- mutex_unlock(&dev->struct_mutex);
if (ret) {
i915_gem_cleanup_aliasing_ppgtt(dev);
- return ret;
+ i915_gem_context_fini(dev);
}
+ mutex_unlock(&dev->struct_mutex);
+ if (ret)
+ return ret;
/* Allow hardware batchbuffers unless told otherwise, but not for KMS.
*/
if (!drm_core_check_feature(dev, DRIVER_MODESET))
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5284dc5..6266b1a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -360,16 +360,11 @@ err_pt_alloc:
return ret;
}
-static int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
+int i915_gem_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- struct i915_hw_ppgtt *ppgtt;
int ret;
- ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
- if (!ppgtt)
- return -ENOMEM;
-
ppgtt->dev = dev;
ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma;
@@ -378,11 +373,6 @@ static int i915_gem_init_aliasing_ppgtt(struct drm_device
*dev)
else
BUG();
- if (ret)
- kfree(ppgtt);
- else
- dev_priv->mm.aliasing_ppgtt = ppgtt;
-
return ret;
}
@@ -637,6 +627,20 @@ static void i915_gtt_color_adjust(struct drm_mm_node *node,
}
}
+bool intel_enable_ppgtt(struct drm_device *dev)
+{
+ if (i915_enable_ppgtt >= 0)
+ return i915_enable_ppgtt;
+
+#ifdef CONFIG_INTEL_IOMMU
+ /* Disable ppgtt on SNB if VT-d is on. */
+ if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
+ return false;
+#endif
+
+ return true;
+}
+
/**
* i915_gem_setup_global_gtt() setup an allocator for the global GTT with the
* given parameters and initialize all PTEs to point to the scratch page.
@@ -708,43 +712,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
guard_size / PAGE_SIZE);
}
-static bool
-intel_enable_ppgtt(struct drm_device *dev)
-{
- if (i915_enable_ppgtt >= 0)
- return i915_enable_ppgtt;
-
-#ifdef CONFIG_INTEL_IOMMU
- /* Disable ppgtt on SNB if VT-d is on. */
- if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
- return false;
-#endif
-
- return true;
-}
-
-void i915_gem_init_global_gtt(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long gtt_size, mappable_size;
-
- gtt_size = dev_priv->gtt.total;
- mappable_size = dev_priv->gtt.mappable_end;
-
- if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
- int ret;
-
- i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size, 0);
- ret = i915_gem_init_aliasing_ppgtt(dev);
- if (!ret)
- return;
-
- DRM_ERROR("Aliased PPGTT setup failed %d\n", ret);
- drm_mm_takedown(&dev_priv->mm.gtt_space);
- }
- i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size, PAGE_SIZE);
-}
-
static int setup_scratch_page(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
--
1.8.3.1
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