we can't have (pipe == crtc->index) assumption in
driver in order to support 3 non-contiguous
display pipe system.

FIXME: Remove the WARN_ON(drm_crtc_index(&crtc->base) != crtc->pipe)
till we won't fix all such assumption.

changes since RFC:
- Added again removed (pipe == crtc->index) WARN_ON.
- Pass drm_crtc_index instead of intel pipe in order to
  call drm_handle_vblank() from gen8_de_irq_handler(),
  other legacy irq handlers also calls drm_handle_vblank()
  with intel pipe but those doesn't require this change.

Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
Cc: Cc: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gu...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c       | 8 ++++----
 drivers/gpu/drm/i915/display/intel_display_types.h | 4 +++-
 drivers/gpu/drm/i915/i915_irq.c                    | 8 ++++++--
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 878d331b9e8c..5709e672151a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14070,11 +14070,11 @@ verify_single_dpll_state(struct drm_i915_private 
*dev_priv,
        if (new_crtc_state->hw.active)
                I915_STATE_WARN(!(pll->active_mask & crtc_mask),
                                "pll active mismatch (expected pipe %c in 
active mask 0x%02x)\n",
-                               pipe_name(drm_crtc_index(&crtc->base)), 
pll->active_mask);
+                               pipe_name(crtc->pipe), pll->active_mask);
        else
                I915_STATE_WARN(pll->active_mask & crtc_mask,
                                "pll active mismatch (didn't expect pipe %c in 
active mask 0x%02x)\n",
-                               pipe_name(drm_crtc_index(&crtc->base)), 
pll->active_mask);
+                               pipe_name(crtc->pipe), pll->active_mask);
 
        I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask),
                        "pll enabled crtcs mismatch (expected 0x%x in 
0x%02x)\n",
@@ -14103,10 +14103,10 @@ verify_shared_dpll_state(struct intel_crtc *crtc,
 
                I915_STATE_WARN(pll->active_mask & crtc_mask,
                                "pll active mismatch (didn't expect pipe %c in 
active mask)\n",
-                               pipe_name(drm_crtc_index(&crtc->base)));
+                               pipe_name(crtc->pipe));
                I915_STATE_WARN(pll->state.crtc_mask & crtc_mask,
                                "pll enabled crtcs mismatch (found %x in 
enabled mask)\n",
-                               pipe_name(drm_crtc_index(&crtc->base)));
+                               pipe_name(crtc->pipe));
        }
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 33ba93863488..80a6460da852 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1618,7 +1618,9 @@ intel_crtc_has_dp_encoder(const struct intel_crtc_state 
*crtc_state)
 static inline void
 intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       drm_wait_one_vblank(&dev_priv->drm, pipe);
+       const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+       drm_wait_one_vblank(&dev_priv->drm, drm_crtc_index(&crtc->base));
 }
 static inline void
 intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe 
pipe)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 22ecd5bc407e..9f8b2566166a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2311,6 +2311,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, 
u32 master_ctl)
 
        for_each_pipe(dev_priv, pipe) {
                u32 fault_errors;
+               struct intel_crtc *crtc =
+                       intel_get_crtc_for_pipe(dev_priv, pipe);
 
                if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe)))
                        continue;
@@ -2324,8 +2326,10 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, 
u32 master_ctl)
                ret = IRQ_HANDLED;
                I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);
 
-               if (iir & GEN8_PIPE_VBLANK)
-                       drm_handle_vblank(&dev_priv->drm, pipe);
+               if (iir & GEN8_PIPE_VBLANK) {
+                       drm_handle_vblank(&dev_priv->drm,
+                                         drm_crtc_index(&crtc->base));
+               }
 
                if (iir & GEN8_PIPE_CDCLK_CRC_DONE)
                        hsw_pipe_crc_irq_handler(dev_priv, pipe);
-- 
2.24.0

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