On Wed, Jun 05, 2013 at 01:34:07PM +0200, Daniel Vetter wrote:
<snip>
> @@ -5731,11 +5740,15 @@ static int ironlake_crtc_mode_set(struct drm_crtc
> *crtc,
> if (encoder->pre_pll_enable)
> encoder->pre_pll_enable(encoder);
>
> - if (intel_crtc->shared_dpll) {
> - I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
> + intel_crtc->lowfreq_avail = false;
> +
> + if (intel_crtc->config.has_pch_encoder) {
> + pll = intel_crtc_to_shared_dpll(intel_crtc);
> +
> + I915_WRITE(pll->pll_reg, dpll);
>
> /* Wait for the clocks to stabilize. */
> - POSTING_READ(intel_crtc->shared_dpll->pll_reg);
> + POSTING_READ(pll->pll_reg);
> udelay(150);
>
> /* The pixel multiplier can only be updated once the
> @@ -5743,16 +5756,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc
> *crtc,
> *
> * So write it again.
> */
> - I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
> - }
> + I915_WRITE(pll->pll_reg, dpll);
>
> - intel_crtc->lowfreq_avail = false;
> - if (intel_crtc->shared_dpll) {
> if (is_lvds && has_reduced_clock && i915_powersave) {
> - I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp2);
> + I915_WRITE(pll->fp1_reg, fp2);
> intel_crtc->lowfreq_avail = true;
> } else {
> - I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp);
> + I915_WRITE(pll->fp1_reg, fp);
> }
I was already a bit annoyed by the weird place of the the lowfreq_avail
assignment between two 'if (pch_pll)' blocks. Good to see it sorted out
:)
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 163bee9..422b2ad 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -306,7 +306,7 @@ struct intel_crtc {
> struct intel_crtc_config config;
>
> /* We can share PLLs across outputs if the timings match */
> - struct intel_shared_dpll *shared_dpll;
> + enum intel_dpll_id shared_dpll;
> uint32_t ddi_pll_sel;
>
> /* reset counter value when the last flip was submitted */
> --
> 1.7.11.7
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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