From: Sean Paul <seanp...@chromium.org> HDCP signalling should not be left on, WARN if it is
Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Cc: Daniel Vetter <daniel.vet...@ffwll.ch> Reviewed-by: Ramalingam C <ramalinga...@intel.com> Signed-off-by: Sean Paul <seanp...@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-4-s...@poorly.run #v2 Changes in v2: - Added to the set in lieu of just clearing the bit Changes in v3: - None --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 32ea3c7e8b62..87b8b347f682 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1998,6 +1998,8 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state val = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); val &= ~TRANS_DDI_FUNC_ENABLE; + WARN_ON(val & TRANS_DDI_HDCP_SIGNALLING); + if (INTEL_GEN(dev_priv) >= 12) { if (!intel_dp_mst_is_master_trans(crtc_state)) val &= ~TGL_TRANS_DDI_PORT_MASK; -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
