On Tue, Jun 04, 2013 at 04:53:39PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zan...@intel.com>
> 
> CTG/ILK/SNB/IVB support 4kx2k surfaces. HSW supports 4kx4k, but
> without proper front buffer invalidation on the last 2k lines, so
> don't enable FBC on these cases for now.
> 
> v2: Use gen >= 5, not gen > 4 (Daniel).
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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