On Thu, Jan 09, 2020 at 06:58:16PM +0200, Stanislav Lisovskiy wrote:
> There seems to be some undocumented bandwidth
> bottleneck/dependency which scales with CDCLK,
> causing FIFO underruns when CDCLK is too low,
> even when it's correct from BSpec point of view.
>
> Currently for TGL platforms we calculate
> min_cdclk initially based on pixel_rate divided
> by 2, accounting for also plane requirements,
> however in some cases the lowest possible CDCLK
> doesn't work and causing the underruns.
>
> Explicitly stating here that this seems to be currently
> rather a Hack, than final solution.
>
> v2: Use clamp operation instead of min(Matt Roper)
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/402
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 7d1ab1e5b7c3..23ef30175090 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2004,6 +2004,20 @@ int intel_crtc_compute_min_cdclk(const struct
> intel_crtc_state *crtc_state)
> /* Account for additional needs from the planes */
> min_cdclk = max(intel_planes_min_cdclk(crtc_state), min_cdclk);
>
> + /*
> + * HACK. Currently for TGL platforms we calculate
> + * min_cdclk initially based on pixel_rate divided
> + * by 2, accounting for also plane requirements,
> + * however in some cases the lowest possible CDCLK
> + * doesn't work and causing the underruns.
> + * Explicitly stating here that this seems to be currently
> + * rather a Hack, than final solution.
> + */
> + if (IS_TIGERLAKE(dev_priv))
> + min_cdclk = clamp(min_cdclk,
> + (int)crtc_state->pixel_rate,
> + (int)dev_priv->max_cdclk_freq);
clamp_t() is neater.
> +
> if (min_cdclk > dev_priv->max_cdclk_freq) {
> DRM_DEBUG_KMS("required cdclk (%d kHz) exceeds max (%d kHz)\n",
> min_cdclk, dev_priv->max_cdclk_freq);
> --
> 2.24.1.485.gad05a3d8e5
--
Ville Syrjälä
Intel
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