An oversight in that we use rc6->ctl_enable to disable rc6 on gen9 and
so it does not simply indicate indirect control via a PCU. Switch the
rc6->ctl_enable check for a platform check.
Fixes: 972745fd5770 ("drm/i915/gt: Disable manual rc6 for Braswell/Baytrail")
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 3 ++-
drivers/gpu/drm/i915/gt/intel_rc6_types.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 8ec2b7725141..9e303c29d6e3 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -576,6 +576,7 @@ void intel_rc6_enable(struct intel_rc6 *rc6)
else if (INTEL_GEN(i915) >= 6)
gen6_rc6_enable(rc6);
+ rc6->manual = rc6->ctl_enable & GEN6_RC_CTL_RC6_ENABLE;
if (NEEDS_RC6_CTX_CORRUPTION_WA(i915))
rc6->ctl_enable = 0;
@@ -612,7 +613,7 @@ void intel_rc6_park(struct intel_rc6 *rc6)
return;
}
- if (!(rc6->ctl_enable & GEN6_RC_CTL_RC6_ENABLE))
+ if (!rc6->manual)
return;
/* Turn off the HW timers and go directly to rc6 */
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6_types.h
b/drivers/gpu/drm/i915/gt/intel_rc6_types.h
index 60decae1abc9..bfbb623f7a4f 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_rc6_types.h
@@ -24,6 +24,7 @@ struct intel_rc6 {
bool supported : 1;
bool enabled : 1;
+ bool manual : 1;
bool wakeref : 1;
};
--
2.24.0
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