FIXME: To be squashed to another patch.
Cc: Vandita Kulkarni <vandita.kulka...@intel.com>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index f09e2e37d442..e343e476dbb5 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -799,11 +799,26 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder
*encoder,
u16 hback_porch;
/* vertical timings */
u16 vtotal, vactive, vsync_start, vsync_end, vsync_shift;
+ int cfr;
+
+ /*
+ * Adjust horizontal timings (htotal, hsync_start, hsync_end) to account
+ * for slower link speed if DSC is enabled.
+ *
+ * cfr for compression frequency ratio.
+ *
+ * FIXME: The clock sources are ugly.
+ */
+ if (pipe_config->dsc.compression_enable)
+ cfr = DIV_ROUND_UP(100 * afe_clk(encoder, pipe_config),
+ intel_dsi_bitrate(intel_dsi));
+ else
+ cfr = 100;
hactive = adjusted_mode->crtc_hdisplay;
- htotal = adjusted_mode->crtc_htotal;
- hsync_start = adjusted_mode->crtc_hsync_start;
- hsync_end = adjusted_mode->crtc_hsync_end;
+ htotal = DIV_ROUND_UP(adjusted_mode->crtc_htotal * cfr, 100);
+ hsync_start = DIV_ROUND_UP(adjusted_mode->crtc_hsync_start * cfr, 100);
+ hsync_end = DIV_ROUND_UP(adjusted_mode->crtc_hsync_end * cfr, 100);
hsync_size = hsync_end - hsync_start;
hback_porch = (adjusted_mode->crtc_htotal -
adjusted_mode->crtc_hsync_end);
--
2.20.1
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