Hi Chris, On Tue, Aug 13, 2019 at 07:20:16AM +0100, Chris Wilson wrote: > The intent of the test is to exercise that each channel in the engine[] > is an independent context/ring/timeline. It setups 64 channels pointing > to rcs0 and then submits one request to each in turn waiting on a > timeline that will force them to run out of submission order. They can > only run in fence order and not submission order if the timelines of > each channel are truly independent. > > However, we released the fences en masse, and once the requests are > ready they are independent any may be executed in any order by the HW,
typo here > especially true with timeslicing that may reorder the requests on a > whim. So instead of releasing all requests at once, increment the > timeline step by step and check we get our results advancing. If the > requests can not be run in fence order and fall back to submission > order, we will time out waiting for our incremental results and trigger > a few GPU hangs. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987 > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Looks OK. Reviewed-by: Andi Shyti <andi.sh...@intel.com> Thanks, Andi _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
