On Thu, 18 Apr 2013 21:35:12 +0200
Daniel Vetter <dan...@ffwll.ch> wrote:
> On Thu, Apr 18, 2013 at 10:46:10AM +0200, Daniel Vetter wrote:
> > Since Paulo's hdmi/dp encoder rework we have the port number ready
> > at hand, so no need to do ugly hardcoding like that. Also, there's
> > the ->pre_enable hook right above waiting to be used.
> >
> > Please encapsulate this into a vlv_check_dpll_port_ready(dev_priv, port)
> > or so and call it from hdmi/dp_pre_enable functions.
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index c124dba..86c4b6d 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -3866,6 +3866,23 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
> > if (encoder->pre_enable)
> > encoder->pre_enable(encoder);
> >
> > + if (IS_VALLEYVIEW(dev)) {
> > + char port;
> > +
> > + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
> > + intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) {
> > + port_mask = DPLL_PORTB_READY_MASK;
> > + port = 'B';
> > + } else {
> > + port_mask = DPLL_PORTC_READY_MASK; /* eDP on port C */
> > + port = 'C';
> > + }
> > +
> > + if (wait_for((I915_READ(DPLL(0)) & port_mask) == 0, 1000))
> > + WARN(1, "timed out waiting for port %c ready: 0x%08x\n",
> > + port, I915_READ(DPLL(0)));
>
> DPLL(crtc->pipe) instead?
Nope, DPLL 0 has the status bits for both ports in the low bits.
--
Jesse Barnes, Intel Open Source Technology Center
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