On Wed, Mar 06, 2013 at 08:03:20PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zan...@intel.com>
>
> Because the register does not exist on LPT. The interesting fact is
> that reading/writing PCH_LVDS on LPT does *not* give us "unclaimed
> register" messages, but the register value is always 0.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
> b/drivers/gpu/drm/i915/i915_suspend.c
> index c1e02b0..41f0fde 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -209,7 +209,8 @@ static void i915_save_display(struct drm_device *dev)
> dev_priv->regfile.saveBLC_PWM_CTL2 =
> I915_READ(BLC_PWM_PCH_CTL2);
> dev_priv->regfile.saveBLC_CPU_PWM_CTL =
> I915_READ(BLC_PWM_CPU_CTL);
> dev_priv->regfile.saveBLC_CPU_PWM_CTL2 =
> I915_READ(BLC_PWM_CPU_CTL2);
> - dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);
> + if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
> + dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);
> } else {
> dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL);
> dev_priv->regfile.savePFIT_PGM_RATIOS =
> I915_READ(PFIT_PGM_RATIOS);
> @@ -271,9 +272,9 @@ static void i915_restore_display(struct drm_device *dev)
> if (drm_core_check_feature(dev, DRIVER_MODESET))
> mask = ~LVDS_PORT_EN;
>
> - if (HAS_PCH_SPLIT(dev)) {
> + if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
> I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);
> - } else if (IS_MOBILE(dev) && !IS_I830(dev))
> + else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
> I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);
>
> if (!IS_I830(dev) && !IS_845G(dev) && !HAS_PCH_SPLIT(dev))
We don't support UMS on gen6+ so yuo can probably just check IS_GEN5
instead of if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
--
Ben Widawsky, Intel Open Source Technology Center
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