On 4/5/19 11:01 AM, Paulo Zanoni wrote:
Em sex, 2019-04-05 às 17:34 +0100, Chris Wilson escreveu:
The engine has a direct link to the intel_uncore mmio handler, so make
use of it rather than going indirectly via &engine->i915->uncore.
Does it make sense to patch the uncore assignment in gen11_lock_sfc()
too in this file?

and if we save the SFC availability to engine->flags at engine init time 
we can also ditch dev_priv entirely in gen11_lock_sfc
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Cc: Paulo Zanoni <paulo.r.zan...@intel.com>
---
  drivers/gpu/drm/i915/i915_reset.c | 9 +++++----
  1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reset.c 
b/drivers/gpu/drm/i915/i915_reset.c
index ddc403ee8855..7e7342b82b78 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -469,10 +469,11 @@ static int gen11_reset_engines(struct drm_i915_private 
*i915,
static int gen8_engine_reset_prepare(struct intel_engine_cs *engine)
  {
-       struct intel_uncore *uncore = &engine->i915->uncore;
+       struct intel_uncore *uncore = engine->uncore;
        int ret;
- intel_uncore_write_fw(uncore, RING_RESET_CTL(engine->mmio_base),
+       intel_uncore_write_fw(uncore,
+                             RING_RESET_CTL(engine->mmio_base),
                              _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET));
ret = __intel_wait_for_register_fw(uncore,
@@ -647,7 +648,7 @@ static void reset_prepare_engine(struct intel_engine_cs 
*engine)
         * written to the powercontext is undefined and so we may lose
         * GPU state upon resume, i.e. fail to restart after a reset.
         */
-       intel_uncore_forcewake_get(&engine->i915->uncore, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
        engine->reset.prepare(engine);
  }
@@ -719,7 +720,7 @@ static int gt_reset(struct drm_i915_private *i915,
  static void reset_finish_engine(struct intel_engine_cs *engine)
  {
        engine->reset.finish(engine);
-       intel_uncore_forcewake_put(&engine->i915->uncore, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(engine->uncore, FORCEWAKE_ALL);
  }
struct i915_gpu_restart {
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