From: Bob Paauwe <bob.j.paa...@intel.com>
While EHL does support 4 level extended ppgtt, it only makes use
of 36 bits instead of the 48 like the other platforms that have
4 level extended ppgtt.
Signed-off-by: Bob Paauwe <bob.j.paa...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index dac08d9c3fab..584bb9898fed 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1539,9 +1539,12 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct
drm_i915_private *i915)
ppgtt->vm.i915 = i915;
ppgtt->vm.dma = &i915->drm.pdev->dev;
- ppgtt->vm.total = HAS_FULL_48BIT_PPGTT(i915) ?
- 1ULL << 48 :
- 1ULL << 32;
+ if (HAS_FULL_48BIT_PPGTT(i915))
+ ppgtt->vm.total = IS_ELKHARTLAKE(i915) ?
+ 1ULL << 36 :
+ 1ULL << 48;
+ else
+ ppgtt->vm.total = 1ULL << 32;
/* From bdw, there is support for read-only pages in the PPGTT. */
ppgtt->vm.has_read_only = true;
--
2.20.1
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