On Tue, 05 Mar 2019, Aditya Swarup <aditya.swa...@intel.com> wrote:
> Setting the pixel rounding bit to 1 in PIPE_CHICKEN register allows
> to passthrough FB pixels unmodified across pipe. This fixes the failures
> for DP link layer compliance tests 4.4.1.1, 4.4.1.2 & 4.4.1.3.
> (Lineage #1605353570)
>
> Cc: Clint Taylor <clinton.a.tay...@intel.com>
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Jani Nikula <jani.nik...@linux.intel.com>
> Signed-off-by: Aditya Swarup <aditya.swa...@intel.com>
> ---
> WA for ICL DP compliance. It fixes failing test in igt for crc mismatch
> wrt cursor plane. Can be searched using Lineage #1605353570.
>
>  drivers/gpu/drm/i915/i915_reg.h      | 1 +
>  drivers/gpu/drm/i915/intel_display.c | 8 +++++++-
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9b868347481..4713fbb3e021 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7663,6 +7663,7 @@ enum {
>  #define _PIPEB_CHICKEN                       0x71038
>  #define _PIPEC_CHICKEN                       0x72038
>  #define  PER_PIXEL_ALPHA_BYPASS_EN   (1 << 7)
> +#define PIXEL_ROUNDING_TRUNC_FB_PASSTHRU (1 << 15)

Nitpick, see the big comment at the top of the file.

While at it, please move both of these bit macros below the
PIPE_CHICKEN() macro. Add two extra spaces after "#define", i.e. total
of three spaces. Order them highest to lowest bit.

BR,
Jani.

>  #define PIPE_CHICKEN(pipe)           _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
>                                                  _PIPEB_CHICKEN)
>  
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index d852cb282060..92be3476fef1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3970,7 +3970,13 @@ static void icl_set_pipe_chicken(struct intel_crtc 
> *crtc)
>        * and rounding for per-pixel values 00 and 0xff
>        */
>       tmp |= PER_PIXEL_ALPHA_BYPASS_EN;
> -
> +     /*
> +      * Display WA # 1605353570: icl
> +      * Set the pixel rounding bit to 1 for allowing
> +      * passthrough of Frame buffer pixels unmodified
> +      * across pipe
> +      */
> +     tmp |= PIXEL_ROUNDING_TRUNC_FB_PASSTHRU;
>       I915_WRITE(PIPE_CHICKEN(pipe), tmp);
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to