On Wed, Feb 06, 2019 at 01:04:19AM +0000, Souza, Jose wrote: > On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrj...@linux.intel.com> > > > > The unused bits on PLANE_WM & co. are hardwired to zero. So no > > need to worry about reading the extra bit on pre-icl. > > > > Reviewed-by: José Roberto de Souza <jose.so...@intel.com>
Thanks. Both patches pushes to dinq. Do you still have enough motivation left to to read through https://patchwork.freedesktop.org/patch/281614/ as well? > > > Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 3 +-- > > drivers/gpu/drm/i915/intel_pm.c | 9 ++------- > > 2 files changed, 3 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index 2be34e13af78..638a586469f9 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6784,8 +6784,7 @@ enum { > > > > #define _PLANE_BUF_CFG_1_B 0x7127c > > #define _PLANE_BUF_CFG_2_B 0x7137c > > -#define SKL_DDB_ENTRY_MASK 0x3FF > > -#define ICL_DDB_ENTRY_MASK 0x7FF > > +#define DDB_ENTRY_MASK 0x7FF /* skl+: > > 10 bits, icl+ 11 bits */ > > #define DDB_ENTRY_END_SHIFT 16 > > #define _PLANE_BUF_CFG_1(pipe) \ > > _PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > b/drivers/gpu/drm/i915/intel_pm.c > > index 737005bf6816..0f15685529a0 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int > > num_active) > > static void skl_ddb_entry_init_from_hw(struct drm_i915_private > > *dev_priv, > > struct skl_ddb_entry *entry, u32 > > reg) > > { > > - u16 mask; > > > > - if (INTEL_GEN(dev_priv) >= 11) > > - mask = ICL_DDB_ENTRY_MASK; > > - else > > - mask = SKL_DDB_ENTRY_MASK; > > - entry->start = reg & mask; > > - entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask; > > + entry->start = reg & DDB_ENTRY_MASK; > > + entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK; > > > > if (entry->end) > > entry->end += 1; -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
