On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> BIOS can leave the PLL to port mapping enabled, even if the
> corresponding encoder is disabled. Disable the port mapping in this
> case.
>
Reviewed-by: José Roberto de Souza <jose.so...@intel.com>
> Cc: Paulo Zanoni <paulo.r.zan...@intel.com>
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Signed-off-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 23 +++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_display.c | 4 ++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 3 files changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index bf58816ed59c..8b7289af7558 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2822,6 +2822,29 @@ void icl_unmap_plls_to_ports(struct drm_crtc
> *crtc,
> }
> }
>
> +void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + u32 val = I915_READ(DPCLKA_CFGCR0_ICL);
> + enum port port = encoder->port;
> + bool clk_enabled = !(val & icl_dpclka_cfgcr0_clk_off(dev_priv,
> port));
> +
> + if (clk_enabled == !!encoder->base.crtc)
> + return;
> +
> + /*
> + * Punt on the case now where clock is disabled, but the
> encoder is
> + * enabled, something else is really broken then.
> + */
> + if (WARN_ON(!clk_enabled))
> + return;
> +
> + DRM_NOTE("Port %c is disabled but it has a mapped PLL, unmap
> it\n",
> + port_name(port));
> + val |= icl_dpclka_cfgcr0_clk_off(dev_priv, port);
> + I915_WRITE(DPCLKA_CFGCR0_ICL, val);
> +}
> +
> static void intel_ddi_clk_select(struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state)
> {
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 12ba2b923e6b..2534263ebb41 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15368,6 +15368,7 @@ static void intel_sanitize_crtc(struct
> intel_crtc *crtc,
>
> static void intel_sanitize_encoder(struct intel_encoder *encoder)
> {
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_connector *connector;
>
> /* We need to check both for a crtc link (meaning that the
> @@ -15409,6 +15410,9 @@ static void intel_sanitize_encoder(struct
> intel_encoder *encoder)
>
> /* notify opregion of the sanitized encoder state */
> intel_opregion_notify_encoder(encoder, connector &&
> has_active_crtc);
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + icl_sanitize_encoder_pll_mapping(encoder);
> }
>
> void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index a3d7b93ecddd..224edb1a95d5 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1519,6 +1519,7 @@ void icl_map_plls_to_ports(struct drm_crtc
> *crtc,
> void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
> struct intel_crtc_state *crtc_state,
> struct drm_atomic_state *old_state);
> +void icl_sanitize_encoder_pll_mapping(struct intel_encoder
> *encoder);
>
> unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
> int color_plane, unsigned int
> height);
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