On Thu, Jan 24, 2013 at 11:22:15PM +0100, Daniel Vetter wrote: > On Thu, Jan 24, 2013 at 03:29:47PM +0200, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä <ville.syrj...@linux.intel.com> > > > > Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> > > I've noticed that the PALETTE moved around a bit for pch-split platforms > already, but otoh the palette support is quite enhanced there already, and > we don't bother with it. Which renders 10bpc a bit pointless. So I'll gulp > this one here.
Yeah we really need to revamp the palette/gamma code at some point. I think what we used to have on older hardware was 8bit LUT or 10bit interpolated ramp. And on more recent hardware we have 8bit LUT, 10bit LUT, or 12bit interpolated ramp. And currently we only use the 8bit LUT. > > --- > > drivers/gpu/drm/i915/i915_reg.h | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index 15ecded..7c71622 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1169,8 +1169,8 @@ > > * Palette regs > > */ > > > > -#define _PALETTE_A 0x0a000 > > -#define _PALETTE_B 0x0a800 > > +#define _PALETTE_A (dev_priv->info->display_mmio_offset + 0xa000) > > +#define _PALETTE_B (dev_priv->info->display_mmio_offset + 0xa800) > > #define PALETTE(pipe) _PIPE(pipe, _PALETTE_A, _PALETTE_B) > > > > /* MCH MMIO space */ > > -- > > 1.7.12.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
