Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
 drivers/char/agp/intel-gtt.c | 35 +++++++++++++++++++++--------------
 include/drm/intel-gtt.h      | 11 +----------
 2 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index c8d9dcb..eb05eb5 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -76,6 +76,14 @@ static struct _intel_private {
        int resource_valid;
        struct page *scratch_page;
        int refcount;
+       /* Size of memory reserved for graphics by the BIOS */
+       unsigned int stolen_size;
+       /* Total number of gtt entries. */
+       unsigned int gtt_total_entries;
+       /* Part of the gtt that is mappable by the cpu, for those chips where
+        * this is not the full gtt. */
+       unsigned int gtt_mappable_entries;
+       phys_addr_t gma_bus_addr;
 } intel_private;
 
 #define INTEL_GTT_GEN  intel_private.driver->gen
@@ -506,7 +514,7 @@ static unsigned int intel_gtt_total_entries(void)
                /* On previous hardware, the GTT size was just what was
                 * required to map the aperture.
                 */
-               return intel_private.base.gtt_mappable_entries;
+               return intel_private.gtt_mappable_entries;
        }
 }
 
@@ -572,8 +580,8 @@ static int intel_gtt_init(void)
        if (ret != 0)
                return ret;
 
-       intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries();
-       intel_private.base.gtt_total_entries = intel_gtt_total_entries();
+       intel_private.gtt_mappable_entries = intel_gtt_mappable_entries();
+       intel_private.gtt_total_entries = intel_gtt_total_entries();
 
        /* save the PGETBL reg for resume */
        intel_private.PGETBL_save =
@@ -585,10 +593,10 @@ static int intel_gtt_init(void)
 
        dev_info(&intel_private.bridge_dev->dev,
                        "detected gtt size: %dK total, %dK mappable\n",
-                       intel_private.base.gtt_total_entries * 4,
-                       intel_private.base.gtt_mappable_entries * 4);
+                       intel_private.gtt_total_entries * 4,
+                       intel_private.gtt_mappable_entries * 4);
 
-       gtt_map_size = intel_private.base.gtt_total_entries * 4;
+       gtt_map_size = intel_private.gtt_total_entries * 4;
 
        intel_private.gtt = NULL;
        if (INTEL_GTT_GEN < 6 && INTEL_GTT_GEN > 2)
@@ -605,7 +613,7 @@ static int intel_gtt_init(void)
 
        global_cache_flush();   /* FIXME: ? */
 
-       intel_private.base.stolen_size = intel_gtt_stolen_size();
+       intel_private.stolen_size = intel_gtt_stolen_size();
 
        intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2;
 
@@ -622,7 +630,7 @@ static int intel_gtt_init(void)
                pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
                                      &gma_addr);
 
-       intel_private.base.gma_bus_addr = (gma_addr & 
PCI_BASE_ADDRESS_MEM_MASK);
+       intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
 
        return 0;
 }
@@ -633,8 +641,7 @@ static int intel_fake_agp_fetch_size(void)
        unsigned int aper_size;
        int i;
 
-       aper_size = (intel_private.base.gtt_mappable_entries << PAGE_SHIFT)
-                   / MB(1);
+       aper_size = (intel_private.gtt_mappable_entries << PAGE_SHIFT) / MB(1);
 
        for (i = 0; i < num_sizes; i++) {
                if (aper_size == intel_fake_agp_sizes[i].size) {
@@ -778,7 +785,7 @@ static int intel_fake_agp_configure(void)
            return -EIO;
 
        intel_private.clear_fake_agp = true;
-       agp_bridge->gart_bus_addr = intel_private.base.gma_bus_addr;
+       agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
 
        return 0;
 }
@@ -844,8 +851,8 @@ static int intel_fake_agp_insert_entries(struct agp_memory 
*mem,
                return -ENODEV;
 
        if (intel_private.clear_fake_agp) {
-               int start = intel_private.base.stolen_size / PAGE_SIZE;
-               int end = intel_private.base.gtt_mappable_entries;
+               int start = intel_private.stolen_size / PAGE_SIZE;
+               int end = intel_private.gtt_mappable_entries;
                intel_gtt_clear_range(start, end - start);
                intel_private.clear_fake_agp = false;
        }
@@ -856,7 +863,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory 
*mem,
        if (mem->page_count == 0)
                goto out;
 
-       if (pg_start + mem->page_count > intel_private.base.gtt_total_entries)
+       if (pg_start + mem->page_count > intel_private.gtt_total_entries)
                goto out_err;
 
        if (type != mem->type)
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 3e3a166..6f53ecd 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -4,22 +4,13 @@
 #define        _DRM_INTEL_GTT_H
 
 struct intel_gtt {
-       /* Size of memory reserved for graphics by the BIOS */
-       unsigned int stolen_size;
-       /* Total number of gtt entries. */
-       unsigned int gtt_total_entries;
-       /* Part of the gtt that is mappable by the cpu, for those chips where
-        * this is not the full gtt. */
-       unsigned int gtt_mappable_entries;
-       /* Whether i915 needs to use the dmar apis or not. */
+       /*  Whether i915 needs to use the dmar apis or not. */
        unsigned int needs_dmar : 1;
        /* Whether we idle the gpu before mapping/unmapping */
        unsigned int do_idle_maps : 1;
        /* Share the scratch page dma with ppgtts. */
        dma_addr_t scratch_page_dma;
        struct page *scratch_page;
-       /* needed for ioremap in drm/i915 */
-       phys_addr_t gma_bus_addr;
 } *intel_gtt_get(void);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
-- 
1.8.1

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