Signed-off-by: Egbert Eich <e...@suse.de>
---
 drivers/gpu/drm/i915/i915_irq.c |   89 ++++++++++++++++++++------------------
 1 files changed, 47 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 356472f..2da788f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1910,19 +1910,56 @@ static void valleyview_irq_preinstall(struct drm_device 
*dev)
  * This register is the same on all known PCH chips.
  */
 
-static void ironlake_enable_pch_hotplug(struct drm_device *dev)
+static void ironlake_enable_pch_hotplug(struct drm_device *dev, bool is_cpt)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
        u32     hotplug;
 
        hotplug = I915_READ(PCH_PORT_HOTPLUG);
-       hotplug &= 
~(PORTD_PULSE_DURATION_MASK|PORTC_PULSE_DURATION_MASK|PORTB_PULSE_DURATION_MASK);
-       hotplug |= PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_2ms;
-       hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
-       hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
+       hotplug &= 
~(PORTD_HOTPLUG_ENABLE|PORTC_HOTPLUG_ENABLE|PORTB_HOTPLUG_ENABLE|
+               
PORTD_PULSE_DURATION_MASK|PORTC_PULSE_DURATION_MASK|PORTB_PULSE_DURATION_MASK);
+       if (dev_priv->hotplug_supported_mask & (is_cpt ? SDE_PORTD_HOTPLUG_CPT 
: SDE_PORTD_HOTPLUG))
+               hotplug |= PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_2ms;
+       if (dev_priv->hotplug_supported_mask & (is_cpt ? SDE_PORTC_HOTPLUG_CPT 
: SDE_PORTC_HOTPLUG))
+               hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
+       if (dev_priv->hotplug_supported_mask & (is_cpt ? SDE_PORTB_HOTPLUG_CPT 
: SDE_PORTB_HOTPLUG))
+               hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
        I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
+static void cpt_enable_hotplug_irq(struct drm_device *dev)
+{
+       drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+       u32 pch_irq_mask;
+
+       pch_irq_mask = ~dev_priv->hotplug_supported_mask;
+
+       I915_WRITE(SDEIIR, I915_READ(SDEIIR));
+       I915_WRITE(SDEIMR, pch_irq_mask);
+       I915_WRITE(SDEIER, dev_priv->hotplug_supported_mask);
+       POSTING_READ(SDEIER);
+
+       ironlake_enable_pch_hotplug(dev, 1);
+}
+
+static void ibx_enable_hotplug_irq(struct drm_device *dev)
+{
+       drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+       u32 hotplug_mask;
+       u32 pch_irq_mask;
+
+       hotplug_mask = (dev_priv->hotplug_supported_mask | SDE_AUX_MASK);
+
+       pch_irq_mask = ~hotplug_mask;
+
+       I915_WRITE(SDEIIR, I915_READ(SDEIIR));
+       I915_WRITE(SDEIMR, pch_irq_mask);
+       I915_WRITE(SDEIER, hotplug_mask);
+       POSTING_READ(SDEIER);
+
+       ironlake_enable_pch_hotplug(dev, 0);
+}
+
 static int ironlake_irq_postinstall(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1930,8 +1967,6 @@ static int ironlake_irq_postinstall(struct drm_device 
*dev)
        u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
                           DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE;
        u32 render_irqs;
-       u32 hotplug_mask;
-       u32 pch_irq_mask;
 
        dev_priv->irq_mask = ~display_mask;
 
@@ -1959,27 +1994,10 @@ static int ironlake_irq_postinstall(struct drm_device 
*dev)
        I915_WRITE(GTIER, render_irqs);
        POSTING_READ(GTIER);
 
-       if (HAS_PCH_CPT(dev)) {
-               hotplug_mask = (SDE_CRT_HOTPLUG_CPT |
-                               SDE_PORTB_HOTPLUG_CPT |
-                               SDE_PORTC_HOTPLUG_CPT |
-                               SDE_PORTD_HOTPLUG_CPT);
-       } else {
-               hotplug_mask = (SDE_CRT_HOTPLUG |
-                               SDE_PORTB_HOTPLUG |
-                               SDE_PORTC_HOTPLUG |
-                               SDE_PORTD_HOTPLUG |
-                               SDE_AUX_MASK);
-       }
-
-       pch_irq_mask = ~hotplug_mask;
-
-       I915_WRITE(SDEIIR, I915_READ(SDEIIR));
-       I915_WRITE(SDEIMR, pch_irq_mask);
-       I915_WRITE(SDEIER, hotplug_mask);
-       POSTING_READ(SDEIER);
-
-       ironlake_enable_pch_hotplug(dev);
+       if (HAS_PCH_CPT(dev))
+               cpt_enable_hotplug_irq(dev);
+       else
+               ibx_enable_hotplug_irq(dev);
 
        if (IS_IRONLAKE_M(dev)) {
                /* Clear & enable PCU event interrupts */
@@ -2001,8 +2019,6 @@ static int ivybridge_irq_postinstall(struct drm_device 
*dev)
                DE_PLANEB_FLIP_DONE_IVB |
                DE_PLANEA_FLIP_DONE_IVB;
        u32 render_irqs;
-       u32 hotplug_mask;
-       u32 pch_irq_mask;
 
        dev_priv->irq_mask = ~display_mask;
 
@@ -2026,18 +2042,7 @@ static int ivybridge_irq_postinstall(struct drm_device 
*dev)
        I915_WRITE(GTIER, render_irqs);
        POSTING_READ(GTIER);
 
-       hotplug_mask = (SDE_CRT_HOTPLUG_CPT |
-                       SDE_PORTB_HOTPLUG_CPT |
-                       SDE_PORTC_HOTPLUG_CPT |
-                       SDE_PORTD_HOTPLUG_CPT);
-       pch_irq_mask = ~hotplug_mask;
-
-       I915_WRITE(SDEIIR, I915_READ(SDEIIR));
-       I915_WRITE(SDEIMR, pch_irq_mask);
-       I915_WRITE(SDEIER, hotplug_mask);
-       POSTING_READ(SDEIER);
-
-       ironlake_enable_pch_hotplug(dev);
+       cpt_enable_hotplug_irq(dev);
 
        return 0;
 }
-- 
1.7.7

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