On Mon, 18 Jun 2018, Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com> wrote:
> On Mon, 2018-06-18 at 11:42 +0530, vathsala nagaraju wrote:
>> From: Vathsala Nagaraju <vathsala.nagar...@intel.com>
>>
>> Adds new psrwake options defined in the below table.
>> Platform PSR wake options vbt version
>> KBL/CFL/WHL All(205+)
>> BXT Uses old interpretation.
>> CNL/ICL+ All(205+)
>> GLK All(205+)
>> SKL All PV releases (Check for 205+ might help but
>> cannot be foolproof)
>>
>> We will continue with newer interpretation for SKL from 205.
> Let's hope this works for most machines out there.
>
> It'd be easier to distinguish newer updated patches if you use version
> numbers.
>
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
Thanks for the patch and review, pushed to dinq with the checkpatch
warnings fixed while at it.
BR,
Jani.
>
>>
>> v2: Jani
>> Keep the bdb version check.
>> v3:
>> Apply newer version for skl from 205+(DK).
>> Add (version check && platform list) (Jani).
>> Add bdb version for each platform in commit message(DK).
>>
>> Cc: Jani Nikula <jani.nik...@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
>> Cc: Puthikorn Voravootivat <put...@chromium.org>
>> Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
>> Cc: Ashutosh D Shukla <ashutosh.d.shu...@intel.com>
>> Cc: Maulik V Vaghela <maulik.v.vagh...@intel.com>
>>
>> Signed-off-by: Vathsala Nagaraju <vathsala.nagar...@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_bios.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c
>> b/drivers/gpu/drm/i915/intel_bios.c
>> index 465dff4..9ef0464 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -710,7 +710,8 @@ static int intel_bios_ssc_frequency(struct
>> drm_i915_private *dev_priv,
>> * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
>> * Old decimal value is wake up time in multiples of 100 us.
>> */
>> - if (bdb->version >= 209 && IS_GEN9_BC(dev_priv)) {
>> + if (bdb->version >= 205 && (IS_GEN9_BC(dev_priv) ||
>> + IS_GEMINILAKE(dev_priv) || (INTEL_GEN(dev_priv) >= 10)))
>> {
>> switch (psr_table->tp1_wakeup_time) {
>> case 0:
>> dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
--
Jani Nikula, Intel Open Source Graphics Center
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