From: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
We skip src trunction/adjustments for
NV12 case and handle the sizes directly.
Without this, pipe fifo underruns are seen on APL/KBL.
v2: For NV12, making the src coordinates multiplier of 4
v3: Moving all the src coords handling code for NV12
to skl_check_nv12_surface
v4: Added RB from Mika
v5: Rebased the series. Removed checks of mult of 4 in
skl_update_scaler, Added NV12 condition in intel_check_sprite_plane
where src x/w is being checked for mult of 2 for yuv planes.
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Signed-off-by: Vidya Srinivas <vidya.srini...@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 42 ++++++++++++++++++++++++++++++++++--
drivers/gpu/drm/i915/intel_sprite.c | 1 +
2 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dfca71e..cca46f9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3102,6 +3102,42 @@ static int skl_check_main_surface(const struct
intel_crtc_state *crtc_state,
return 0;
}
+static int
+skl_check_nv12_surface(const struct intel_crtc_state *crtc_state,
+ struct intel_plane_state *plane_state)
+{
+ int crtc_x2 = plane_state->base.crtc_x + plane_state->base.crtc_w;
+ int crtc_y2 = plane_state->base.crtc_y + plane_state->base.crtc_h;
+
+ if (((plane_state->base.src_x >> 16) % 4) != 0 ||
+ ((plane_state->base.src_y >> 16) % 4) != 0 ||
+ ((plane_state->base.src_w >> 16) % 4) != 0 ||
+ ((plane_state->base.src_h >> 16) % 4) != 0) {
+ DRM_DEBUG_KMS("src coords must be multiple of 4 for NV12\n");
+ return -EINVAL;
+ }
+
+ /* Clipping would cause a 1-3 pixel gap at the edge of the screen? */
+ if ((crtc_x2 > crtc_state->pipe_src_w && crtc_state->pipe_src_w % 4) ||
+ (crtc_y2 > crtc_state->pipe_src_h && crtc_state->pipe_src_h % 4)) {
+ DRM_DEBUG_KMS("It's not possible to clip %u,%u to %u,%u\n",
+ crtc_x2, crtc_y2,
+ crtc_state->pipe_src_w, crtc_state->pipe_src_h);
+ return -EINVAL;
+ }
+
+ plane_state->base.src.x1 =
+ DIV_ROUND_CLOSEST(plane_state->base.src.x1, 1 << 18) << 18;
+ plane_state->base.src.x2 =
+ DIV_ROUND_CLOSEST(plane_state->base.src.x2, 1 << 18) << 18;
+ plane_state->base.src.y1 =
+ DIV_ROUND_CLOSEST(plane_state->base.src.y1, 1 << 18) << 18;
+ plane_state->base.src.y2 =
+ DIV_ROUND_CLOSEST(plane_state->base.src.y2, 1 << 18) << 18;
+
+ return 0;
+}
+
static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
{
const struct drm_framebuffer *fb = plane_state->base.fb;
@@ -3185,6 +3221,9 @@ int skl_check_plane_surface(const struct intel_crtc_state
*crtc_state,
* the main surface setup depends on it.
*/
if (fb->format->format == DRM_FORMAT_NV12) {
+ ret = skl_check_nv12_surface(crtc_state, plane_state);
+ if (ret)
+ return ret;
ret = skl_check_nv12_aux_surface(plane_state);
if (ret)
return ret;
@@ -4806,8 +4845,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state,
bool force_detach,
}
if (plane_scaler_check && pixel_format == DRM_FORMAT_NV12 &&
- (src_h < SKL_MIN_YUV_420_SRC_H || (src_w % 4) != 0 ||
- (src_h % 4) != 0)) {
+ (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
DRM_DEBUG_KMS("NV12: src dimensions not met\n");
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index 0c394a2..c73553a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1011,6 +1011,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
src->y2 = (src_y + src_h) << 16;
if (intel_format_is_yuv(fb->format->format) &&
+ fb->format->format != DRM_FORMAT_NV12 &&
(src_x % 2 || src_w % 2)) {
DRM_DEBUG_KMS("src x/w (%u, %u) must be a multiple of 2
for YUV planes\n",
src_x, src_w);
--
2.7.4
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