From: Paulo Zanoni <paulo.r.zan...@intel.com>

Because we already set all the bits we can set.

Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 4fbb296..10ea4f5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1729,17 +1729,16 @@ static void lpt_enable_pch_transcoder(struct 
drm_i915_private *dev_priv,
        assert_fdi_tx_enabled(dev_priv, cpu_transcoder);
        assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
 
-       val = I915_READ(_TRANSACONF);
+       val = TRANS_ENABLE;
        pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));
 
-       val &= ~TRANS_INTERLACE_MASK;
        if ((pipeconf_val & PIPECONF_INTERLACE_MASK_HSW) ==
            PIPECONF_INTERLACED_ILK)
                val |= TRANS_INTERLACED;
        else
                val |= TRANS_PROGRESSIVE;
 
-       I915_WRITE(_TRANSACONF, val | TRANS_ENABLE);
+       I915_WRITE(_TRANSACONF, val);
        if (wait_for(I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE, 100))
                DRM_ERROR("Failed to enable PCH transcoder\n");
 }
-- 
1.7.11.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to