On Fri, 26 Oct 2012 10:42:54 -0700, Jesse Barnes <jbar...@virtuousgeek.org>
wrote:
> On Fri, 26 Oct 2012 18:30:50 +0100
> Damien Lespiau <damien.lesp...@gmail.com> wrote:
>
> > From: Damien Lespiau <damien.lesp...@intel.com>
> >
> > Signed-off-by: Damien Lespiau <damien.lesp...@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_sprite.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> > b/drivers/gpu/drm/i915/intel_sprite.c
> > index 3434b6e..aa8d09b 100644
> > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > @@ -465,6 +465,11 @@ intel_update_plane(struct drm_plane *plane, struct
> > drm_crtc *crtc,
> > if (intel_plane->pipe != intel_crtc->pipe)
> > return -EINVAL;
> >
> > + /* Sprite planes can be linear or x-tiled surfaces */
> > + if (!(obj->tiling_mode == I915_TILING_NONE ||
> > + obj->tiling_mode == I915_TILING_X))
> > + return -EINVAL;
> > +
> > /*
> > * Clamp the width & height into the visible area. Note we don't
> > * try to scale the source if part of the visible region is offscreen.
>
> Do we not catch this when we make the fb? If not we may want to do
> this there...
We do. However, we don't catch userspace changing the tiling on an
existing fb (unless actually pinned)... The extra level of defense is
certainly welcome, and provides documentation at all levels on the known
capabilities of the hw. (The only downside is that we have more guards to
fixup if those ever change, but unlikely ;) The only bikeshed is that
elsewhere we use
switch (obj->tiling_mode) {
case I915_TILING_NONE:
case I915_TILING_X:
break;
default:
return -EINVAL;
}
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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