The BIOS shouldn't be touching this memory across suspend/resume, so
just leave it alone. This saves us ~50ms on resume on my T420.
v2: change gtt restore default on pre-gen4 (Chris)
move needs_gtt_restore flag into dev_priv
Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_dma.c | 4 ++++
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
drivers/gpu/drm/i915/i915_drv.h | 2 ++
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index b5977b4..c027266 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1339,6 +1339,10 @@ static int i915_load_modeset_init(struct drm_device *dev)
/* FIXME: do pre/post-mode set stuff in core KMS code */
dev->vblank_disable_allowed = 1;
+ /* Gen4+ should have saner BIOSes (we hope) */
+ if (INTEL_INFO(dev)->gen < 4)
+ dev_priv->needs_gtt_restore = true;
+
ret = intel_fbdev_init(dev);
if (ret)
goto cleanup_irq;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 4d858a9..be9f47d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -540,7 +540,8 @@ static int i915_drm_thaw(struct drm_device *dev)
intel_gt_reset(dev);
- if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+ if (drm_core_check_feature(dev, DRIVER_MODESET) &&
+ dev_priv->needs_gtt_restore) {
mutex_lock(&dev->struct_mutex);
i915_gem_restore_gtt_mappings(dev);
mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1e84a59..a38eba8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -873,6 +873,8 @@ typedef struct drm_i915_private {
struct delayed_work gen6_power_work;
+ bool needs_gtt_restore;
+
enum no_fbc_reason no_fbc_reason;
struct drm_mm_node *compressed_fb;
--
1.7.9.5
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