On Thursday, January 4, 2018 12:35:48 PM PST Maarten Lankhorst wrote:
> Op 03-01-18 om 21:39 schreef Dhinakaran Pandiyan:
> > Since we want to allow for a non-blocking power domain for vblanks,
> > the power domain use count and power well use count will not be updated
> > atomically inside the power domain mutex (see next patch). This affects
> > verifying if sum(power_domain_use_count) == power_well_use_count at
> > init time. So do not enable vblanks until this verification is done.
> > 
> > Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> > Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> > Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
> > Cc: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
> > ---
> > 
> >  drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++++----
> >  1 file changed, 20 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c index 0cd355978ab4..7bc874b8dac7
> > 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -14739,6 +14739,24 @@ static bool has_pch_trancoder(struct
> > drm_i915_private *dev_priv,> 
> >             (HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A);
> >  
> >  }
> > 
> > +static void modeset_enable_vblanks(struct drm_i915_private *dev_priv)
> > +{
> > +   enum pipe pipe;
> > +
> > +   for_each_pipe(dev_priv, pipe) {
> > +           struct intel_crtc *crtc;
> > +
> > +           crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
> > +
> > +           /* restore vblank interrupts to correct state */
> > +           drm_crtc_vblank_reset(&crtc->base);
> > +
> > +           if (crtc->active)
> > +                   drm_crtc_vblank_on(&crtc->base);
> > +   }
> > +}
> > +
> > +
> > 
> >  static void intel_sanitize_crtc(struct intel_crtc *crtc,
> >  
> >                             struct drm_modeset_acquire_ctx *ctx)
> >  
> >  {
> > 
> > @@ -14754,13 +14772,9 @@ static void intel_sanitize_crtc(struct intel_crtc
> > *crtc,> 
> >                        I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
> >     
> >     }
> > 
> > -   /* restore vblank interrupts to correct state */
> > -   drm_crtc_vblank_reset(&crtc->base);
> > 
> >     if (crtc->active) {
> >     
> >             struct intel_plane *plane;
> > 
> > -           drm_crtc_vblank_on(&crtc->base);
> > -
> > 
> >             /* Disable everything but the primary plane */
> >             for_each_intel_plane_on_crtc(dev, crtc, plane) {
> >             
> >                     const struct intel_plane_state *plane_state =
> > 
> > @@ -15147,6 +15161,8 @@ intel_modeset_setup_hw_state(struct drm_device
> > *dev,> 
> >     intel_power_domains_verify_state(dev_priv);
> > 
> > +   modeset_enable_vblanks(dev_priv);
> > +
> > 
> >     intel_fbc_init_pipe_state(dev_priv);
> >  
> >  }
> 
> intel_pre_disable_primary_noatomic calls wait_for_vblank, which will fail
> with this patch. Wouldn't it be better to make
> intel_power_domains_verify_state work correctly with the vblank irq?

How about disabling vblanks just before power_domains_verify_state and 
enabling it back again?

Another option is to ignore the check in power_domains_verify_state  for 
DC_OFF. 

-DK

> 
> ~Maarten
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
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