On 17/12/2017 13:28, Chris Wilson wrote:
Inside i915_gem_reset(), we start touching the HW and so require the low-level HW to be re-enabled, in particular the PCI BARs.Fixes: 7b6da818d86f ("drm/i915: Restore the kernel context after a GPU reset on an idle engine") Testcase: igt/drv_hangman # i915g/i915gm Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Michel Thierry <michel.thie...@intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 6d39fdf2b604..72bea281edb7 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1924,9 +1924,6 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags) goto taint; }- i915_gem_reset(i915);- intel_overlay_reset(i915); - /* Ok, now get things going again... *//*@@ -1939,6 +1936,9 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags) goto error; }+ i915_gem_reset(i915);+ intel_overlay_reset(i915); + /* * Next we need to restore the context, but we don't use those * yet either...
Looks fine to me. Reviewed-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
