Quoting Ville Syrjala (2017-11-29 15:37:31)
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> We should make sure the pipe has fully started when we enable it from
> the i830 "power well". Otherwise theoretically i830 could also hit
> problems with vblank timestamps jumping around (since we skip the
> wait during modeset on i830). Additionally moving planes between the
> pipes etc. might not work correctly until both pipes are actually up and
> running.
>
> v2: Less pointless duplication in the code (Chris)
>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> #v1
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk>
-Chris
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