On Wed, Sep 19, 2012 at 01:29:01PM -0700, Jesse Barnes wrote: > To match IVB. > > Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
- [Intel-gfx] [PATCH 6/9] drm/i915: implement WaDisablePSDDual... Jesse Barnes
- [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch location... Jesse Barnes
- Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch... Daniel Vetter
- Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scr... Jesse Barnes
- Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW... Daniel Vetter
- Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a... Jesse Barnes
- [Intel-gfx] [PATCH 5/9] drm/i915: implement WaDisableEarlyCu... Jesse Barnes
- [Intel-gfx] [PATCH 2/9] drm/i915: implement WaForceL3Seriali... Jesse Barnes
- [Intel-gfx] [PATCH 7/9] drm/i915: limit VLV IRQ enables to t... Jesse Barnes
- Re: [Intel-gfx] [PATCH 7/9] drm/i915: limit VLV IRQ ena... Daniel Vetter
- [Intel-gfx] [PATCH 4/9] drm/i915: add post-flush store dw wo... Jesse Barnes
- [Intel-gfx] [PATCH 8/9] drm/i915: TLB invalidation with MI_F... Jesse Barnes
- [Intel-gfx] [PATCH 9/9] drm/i915: PIPE_CONTROL TLB invalidat... Jesse Barnes
- Re: [Intel-gfx] [PATCH 1/9] drm/i915: disable DOP clock gati... Ben Widawsky