On Mon, Oct 23, 2017 at 10:39:20AM -0700, Rodrigo Vivi wrote:
> As we faced in BXT, on CNL DDI_A_4_LANES is not
> set as expected when system is boot with multiple
> monitors connected. This result in wrong lane
> setup impacting the max data rate available and
> consequently blocking modeset on eDP, resulting
> in a blank screen.
>
> Most of CNL SKUs don't support DDI-E.
> The only SKU that supports DDI-E is the same
> that supports the full A/E split called DDI-F.
>
> Also when DDI-F is used DDI-E cannot be used because
> they share Interrupts. So DDI-E is almost useless.
> Anyways let's consider this is possible and rely on
> VBT for that.
>
> This patch was initialy start by Clint, but required
> many changes including full commit message. So
> Credits entirely to Clint for finding this.
>
> v2: Extract all messy conditions into a helper function
> as suggested by Ville.
> Along with simplification I removed the debug
> message on the working case since now all conditions
> are grouped.
> v3: Split the conditions even more as suggested by Ville.
> Get's cleaner and easier to add new cases in the
> future.
>
> Suggested-by: Clint Taylor <clinton.a.tay...@intel.com>
> Cc: Clint Taylor <clinton.a.tay...@intel.com>
> Cc: Mika Kahola <mika.kah...@intel.com>
> Cc: Jani Nikula <jani.nik...@intel.com>
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 46
> ++++++++++++++++++++++++++++++----------
> 1 file changed, 35 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index adf51b328844..38a7088bd39c 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2694,6 +2694,34 @@ intel_ddi_init_hdmi_connector(struct
> intel_digital_port *intel_dig_port)
> return connector;
> }
>
> +static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
> +{
> + struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
> +
> + if (dport->port != PORT_A)
> + return false;
> +
> + if (dport->saved_port_bits & DDI_A_4_LANES)
> + return false;
> +
> + /* Broxton/Geminilake: Bspec says that DDI_A_4_LANES is the only
> + * supported configuration
> + */
> + if (IS_GEN9_LP(dev_priv))
> + return true;
> +
> + /* Cannonlake: Most of SKUs don't support DDI_E, and the only
> + * one who does also have a full A/E split called
> + * DDI_F what makes DDI_E useless. However for this
> + * case let's trust VBT info.
> + */
> + if (IS_CANNONLAKE(dev_priv) &&
> + !intel_bios_is_port_present(dev_priv, PORT_E))
> + return true;
> +
> + return false;
> +}
> +
> void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> {
> struct intel_digital_port *intel_dig_port;
> @@ -2803,18 +2831,14 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
> }
>
> /*
> - * Bspec says that DDI_A_4_LANES is the only supported configuration
> - * for Broxton. Yet some BIOS fail to set this bit on port A if eDP
> - * wasn't lit up at boot. Force this bit on in our internal
> - * configuration so that we use the proper lane count for our
> - * calculations.
> + * Some BIOS might fail to set this bit on port A if eDP
> + * wasn't lit up at boot. Force this bit set when needed
> + * so we use the proper lane count for our calculations.
> */
> - if (IS_GEN9_LP(dev_priv) && port == PORT_A) {
> - if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
> - DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for
> port A; fixing\n");
> - intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> - max_lanes = 4;
> - }
> + if (intel_ddi_a_force_4_lanes(intel_dig_port)) {
> + DRM_DEBUG_KMS("Forcing DDI_A_4_LANES for port A\n");
> + intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> + max_lanes = 4;
> }
>
> intel_dig_port->max_lanes = max_lanes;
> --
> 2.13.5
--
Ville Syrjälä
Intel OTC
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