Maybe we are missing a vblank wait somewhere on kernel CRC code?! Or maybe o kernel we read and discard the first for GLK?! :/ Also this is pipe crc right?! Shouldn't it be independent of the panel at the end?! Does it only happen with MIPI/DSI ?! Or it just happen on that particular unity on CI that coincidentally has this panel?!
On Fri, Sep 22, 2017 at 5:40 AM Mika Kahola <mika.kah...@intel.com> wrote: > It seems that at least with GLK with MIPI/DSI display, the first collected > CRC is bogus. To fix this, try to collect two CRC's instead of one. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101309 > Signed-off-by: Mika Kahola <mika.kah...@intel.com> > --- > tests/kms_frontbuffer_tracking.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/tests/kms_frontbuffer_tracking.c > b/tests/kms_frontbuffer_tracking.c > index a068c8a..df7cc6e 100644 > --- a/tests/kms_frontbuffer_tracking.c > +++ b/tests/kms_frontbuffer_tracking.c > @@ -1239,8 +1239,18 @@ static void print_crc(const char *str, struct > both_crcs *crc) > > static void collect_crcs(struct both_crcs *crcs, bool mandatory_sink_crc) > { > - igt_pipe_crc_collect_crc(pipe_crc, &crcs->pipe); > + int n; > + igt_crc_t *crc = NULL; > + > + igt_pipe_crc_start(pipe_crc); > + n = igt_pipe_crc_get_crcs(pipe_crc, 2, &crc); > + igt_pipe_crc_stop(pipe_crc); > + igt_assert(n > 0); > + igt_assert_crc_equal(&crc[0], &crc[1]); > + crcs->pipe = crc[0]; > + > get_sink_crc(&crcs->sink, mandatory_sink_crc); > + free(crc); > } > > static void init_blue_crc(enum pixel_format format, bool > mandatory_sink_crc) > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > -- Rodrigo Vivi Blog: http://blog.vivi.eng.br
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