On Wed, 2017-07-12 at 12:20 -0700, Rodrigo Vivi wrote:
> Continue on VPV PSR split with vfunc, let's also create one
Typo s/VPV/VLV
> for enabling sink.
>
> Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
> Cc: Jim Bride <jim.br...@linux.intel.com>
> Cc: Vathsala NAgaraju <vathsala.nagar...@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_psr.c | 9 +++------
> 2 files changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 326a0ef645c2..50b577b5e4d1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1147,6 +1147,7 @@ struct i915_psr {
> bool alpm;
>
> void (*disable_source)(struct intel_dp *);
> + void (*enable_sink)(struct intel_dp *);
> void (*activate)(struct intel_dp *);
> void (*setup_vsc)(struct intel_dp *);
> };
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index b52e4da8a151..73f7ba78f4d2 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -536,16 +536,11 @@ void intel_psr_enable(struct intel_dp *intel_dp)
> dev_priv->psr.busy_frontbuffer_bits = 0;
>
> dev_priv->psr.setup_vsc(intel_dp);
> + dev_priv->psr.enable_sink(intel_dp);
>
> if (HAS_DDI(dev_priv)) {
> - /* Enable PSR on the panel */
> - hsw_psr_enable_sink(intel_dp);
> -
> hsw_psr_enable_source(intel_dp);
> } else {
> - /* Enable PSR on the panel */
> - vlv_psr_enable_sink(intel_dp);
> -
> vlv_psr_enable_source(intel_dp);
> }
>
> @@ -972,10 +967,12 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> dev_priv->psr.disable_source = vlv_psr_disable;
> + dev_priv->psr.enable_sink = vlv_psr_enable_sink;
> dev_priv->psr.activate = vlv_psr_activate;
> dev_priv->psr.setup_vsc = vlv_psr_setup_vsc;
> } else {
> dev_priv->psr.disable_source = hsw_psr_disable;
> + dev_priv->psr.enable_sink = hsw_psr_enable_sink;
> dev_priv->psr.activate = hsw_psr_activate;
> dev_priv->psr.setup_vsc = hsw_psr_setup_vsc;
> }
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