On Mon, Aug 21, 2017 at 05:03:55PM -0700, Rodrigo Vivi wrote:
> From: Paulo Zanoni <paulo.r.zan...@intel.com>
> 
> Make it a little less magical and a little simpler and more hardcoded
> so we don't end up with an array that's composed mostly of empty
> entries.
> 
> v2: Add an enum for the voltage+register values (Ville).
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>

For the series
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 58 
> +++++++++++++++++++++------------
>  1 file changed, 37 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index b66d8e136aa3..b7f4fbe7ae0d 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2707,24 +2707,27 @@ void bxt_display_core_uninit(struct drm_i915_private 
> *dev_priv)
>       usleep_range(10, 30);           /* 10 us delay per Bspec */
>  }
>  
> -#define CNL_PROCMON_IDX(val) \
> -     (((val) & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) >> 
> VOLTAGE_INFO_SHIFT)
> -#define NUM_CNL_PROCMON \
> -     (CNL_PROCMON_IDX(VOLTAGE_INFO_MASK | PROCESS_INFO_MASK) + 1)
> +enum {
> +     PROCMON_0_85V_DOT_0,
> +     PROCMON_0_95V_DOT_0,
> +     PROCMON_0_95V_DOT_1,
> +     PROCMON_1_05V_DOT_0,
> +     PROCMON_1_05V_DOT_1,
> +};
>  
>  static const struct cnl_procmon {
>       u32 dw1, dw9, dw10;
> -} cnl_procmon_values[NUM_CNL_PROCMON] = {
> -     [CNL_PROCMON_IDX(VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0)] =
> -             { .dw1 = 0x00 << 16, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96, },
> -     [CNL_PROCMON_IDX(VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_0)] =
> -             { .dw1 = 0x00 << 16, .dw9 = 0x86E172C7, .dw10 = 0x77CA5EAB, },
> -     [CNL_PROCMON_IDX(VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_1)] =
> -             { .dw1 = 0x00 << 16, .dw9 = 0x93F87FE1, .dw10 = 0x8AE871C5, },
> -     [CNL_PROCMON_IDX(VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_0)] =
> -             { .dw1 = 0x00 << 16, .dw9 = 0x98FA82DD, .dw10 = 0x89E46DC1, },
> -     [CNL_PROCMON_IDX(VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_1)] =
> -             { .dw1 = 0x44 << 16, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1, },
> +} cnl_procmon_values[] = {
> +     [PROCMON_0_85V_DOT_0] =
> +             { .dw1 = 0x00000000, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96, },
> +     [PROCMON_0_95V_DOT_0] =
> +             { .dw1 = 0x00000000, .dw9 = 0x86E172C7, .dw10 = 0x77CA5EAB, },
> +     [PROCMON_0_95V_DOT_1] =
> +             { .dw1 = 0x00000000, .dw9 = 0x93F87FE1, .dw10 = 0x8AE871C5, },
> +     [PROCMON_1_05V_DOT_0] =
> +             { .dw1 = 0x00000000, .dw9 = 0x98FA82DD, .dw10 = 0x89E46DC1, },
> +     [PROCMON_1_05V_DOT_1] =
> +             { .dw1 = 0x00440000, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1, },
>  };
>  
>  static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool 
> resume)
> @@ -2747,9 +2750,25 @@ static void cnl_display_core_init(struct 
> drm_i915_private *dev_priv, bool resume
>       I915_WRITE(CHICKEN_MISC_2, val);
>  
>       val = I915_READ(CNL_PORT_COMP_DW3);
> -     procmon = &cnl_procmon_values[CNL_PROCMON_IDX(val)];
> -
> -     WARN_ON(procmon->dw10 == 0);
> +     switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
> +     default:
> +             MISSING_CASE(val);
> +     case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
> +             procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
> +             break;
> +     case VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_0:
> +             procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_0];
> +             break;
> +     case VOLTAGE_INFO_0_95V | PROCESS_INFO_DOT_1:
> +             procmon = &cnl_procmon_values[PROCMON_0_95V_DOT_1];
> +             break;
> +     case VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_0:
> +             procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_0];
> +             break;
> +     case VOLTAGE_INFO_1_05V | PROCESS_INFO_DOT_1:
> +             procmon = &cnl_procmon_values[PROCMON_1_05V_DOT_1];
> +             break;
> +     }
>  
>       val = I915_READ(CNL_PORT_COMP_DW1);
>       val &= ~((0xff << 16) | 0xff);
> @@ -2784,9 +2803,6 @@ static void cnl_display_core_init(struct 
> drm_i915_private *dev_priv, bool resume
>       gen9_dbuf_enable(dev_priv);
>  }
>  
> -#undef CNL_PROCMON_IDX
> -#undef NUM_CNL_PROCMON
> -
>  static void cnl_display_core_uninit(struct drm_i915_private *dev_priv)
>  {
>       struct i915_power_domains *power_domains = &dev_priv->power_domains;
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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