[Intel-gfx] [PATCH 02/12] drm/i915/psr: Avoid any PSR stuff on platforms without support.

[Rodrigo Vivi]

We really don't want to setup vfuncs and lock mutexes on
platforms that has no support to PSR.

Also we know what platforms they are so let's do it quietly.

Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
Cc: Jim Bride <jim.br...@linux.intel.com>
Cc: Vathsala NAgaraju <vathsala.nagar...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 1af4438a6095..71d65e166277 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -485,10 +485,8 @@ void intel_psr_enable(struct intel_dp *intel_dp)
        enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
        u32 chicken;
 
-       if (!HAS_PSR(dev_priv)) {
-               DRM_DEBUG_KMS("PSR not supported on this platform\n");
+       if (!HAS_PSR(dev_priv))
                return;
-       }
 
        if (!is_edp_psr(intel_dp)) {
                DRM_DEBUG_KMS("PSR not supported by this panel\n");
@@ -664,6 +662,9 @@ void intel_psr_disable(struct intel_dp *intel_dp)
        struct drm_device *dev = intel_dig_port->base.base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -815,6 +816,9 @@ void intel_psr_single_frame_update(struct drm_i915_private 
*dev_priv,
        enum pipe pipe;
        u32 val;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        /*
         * Single frame update is already supported on BDW+ but it requires
         * many W/A and it isn't really needed.
@@ -861,6 +865,9 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -898,6 +905,9 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
        struct drm_crtc *crtc;
        enum pipe pipe;
 
+       if (!HAS_PSR(dev_priv))
+               return;
+
        mutex_lock(&dev_priv->psr.lock);
        if (!dev_priv->psr.enabled) {
                mutex_unlock(&dev_priv->psr.lock);
@@ -930,6 +940,9 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
  */
 void intel_psr_init(struct drm_i915_private *dev_priv)
 {
+       if (!HAS_PSR(dev_priv))
+               return;
+
        dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ?
                HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE;
 
-- 
2.13.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx