Now that we are actually using the watch timers, enabling the interrupts
just makes sense.
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_irq.c | 8 ++++++++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 566f61b..a376371 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -475,6 +475,12 @@ static void snb_gt_irq_handler(struct drm_device *dev,
i915_handle_error(dev, false);
}
+ if (gt_iir & (GT_GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED))
+ DRM_ERROR("Render timeout expired\n");
+
+ if (gt_iir & (GT_GEN6_BSD_TIMEOUT_COUNTER_EXPIRED))
+ DRM_ERROR("BSD timeout expired\n");
+
if (gt_iir & GT_GEN7_L3_PARITY_ERROR_INTERRUPT)
ivybridge_handle_parity_error(dev);
}
@@ -1816,6 +1822,8 @@ static int ironlake_irq_postinstall(struct drm_device
*dev)
if (IS_GEN6(dev))
render_irqs =
GT_USER_INTERRUPT |
+ GT_GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED |
+ GT_GEN6_BSD_TIMEOUT_COUNTER_EXPIRED |
GEN6_BSD_USER_INTERRUPT |
GEN6_BLITTER_USER_INTERRUPT;
else
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 195154b..558ed9a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -699,6 +699,7 @@
#define GEN6_BSD_HWSTAM 0x12098
#define GEN6_BSD_IMR 0x120a8
+#define GEN6_BSD_TIMEOUT_COUNTER_EXPIRED (1 << 18)
#define GEN6_BSD_USER_INTERRUPT (1 << 12)
#define GEN6_BSD_RNCID 0x12198
@@ -3346,8 +3347,10 @@
#define GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT (1 << 26)
#define GT_GEN6_BLT_CS_ERROR_INTERRUPT (1 << 25)
#define GT_GEN6_BLT_USER_INTERRUPT (1 << 22)
+#define GT_GEN6_BSD_TIMEOUT_COUNTER_EXPIRED (1 << 18)
#define GT_GEN6_BSD_CS_ERROR_INTERRUPT (1 << 15)
#define GT_GEN6_BSD_USER_INTERRUPT (1 << 12)
+#define GT_GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED (1 << 6)
#define GT_BSD_USER_INTERRUPT (1 << 5) /* ilk only */
#define GT_GEN7_L3_PARITY_ERROR_INTERRUPT (1 << 5)
#define GT_PIPE_NOTIFY (1 << 4)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f61b4a0..82bd0cd 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1397,7 +1397,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
ring->flush = gen6_render_ring_flush;
ring->irq_get = gen6_ring_get_irq;
ring->irq_put = gen6_ring_put_irq;
- ring->irq_enable_mask = GT_USER_INTERRUPT;
+ ring->irq_enable_mask = GT_USER_INTERRUPT |
GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED;
ring->get_seqno = gen6_ring_get_seqno;
ring->sync_to = gen6_ring_sync;
ring->semaphore_register[0] = MI_SEMAPHORE_SYNC_INVALID;
@@ -1530,7 +1530,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
ring->flush = gen6_ring_flush;
ring->add_request = gen6_add_request;
ring->get_seqno = gen6_ring_get_seqno;
- ring->irq_enable_mask = GEN6_BSD_USER_INTERRUPT;
+ ring->irq_enable_mask = GEN6_BSD_USER_INTERRUPT |
GEN6_BSD_TIMEOUT_COUNTER_EXPIRED;
ring->irq_get = gen6_ring_get_irq;
ring->irq_put = gen6_ring_put_irq;
ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
--
1.7.11.2
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