It's all redundant with the object now. Simply store that.
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 58 ++++++++-------------------------
1 file changed, 13 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 33d87ad..130a5a7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -34,16 +34,6 @@
#include "i915_trace.h"
#include "intel_drv.h"
-/*
- * 965+ support PIPE_CONTROL commands, which provide finer grained control
- * over cache flushing.
- */
-struct pipe_control {
- struct drm_i915_gem_object *obj;
- volatile u32 *cpu_page;
- u32 gtt_offset;
-};
-
static inline int ring_space(struct intel_ring_buffer *ring)
{
int space = (ring->head & HEAD_ADDR) - (ring->tail + 8);
@@ -176,8 +166,8 @@ gen4_render_ring_flush(struct intel_ring_buffer *ring,
static int
intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring)
{
- struct pipe_control *pc = ring->private;
- u32 scratch_addr = pc->gtt_offset + 128;
+ struct drm_i915_gem_object *obj = ring->private;
+ u32 scratch_addr = obj->gtt_offset + 128;
int ret;
@@ -214,8 +204,8 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring,
u32 invalidate_domains, u32 flush_domains)
{
u32 flags = 0;
- struct pipe_control *pc = ring->private;
- u32 scratch_addr = pc->gtt_offset + 128;
+ struct drm_i915_gem_object *obj = ring->private;
+ u32 scratch_addr = obj->gtt_offset + 128;
int ret;
/* Force SNB workarounds for PIPE_CONTROL flushes */
@@ -391,54 +381,32 @@ err_unref:
static int
init_pipe_control(struct intel_ring_buffer *ring)
{
- struct pipe_control *pc;
struct drm_i915_gem_object *obj;
- int ret;
if (ring->private)
return 0;
- pc = kmalloc(sizeof(*pc), GFP_KERNEL);
- if (!pc)
- return -ENOMEM;
-
obj = ring_alloc_object(ring->dev);
if (IS_ERR(obj)) {
DRM_ERROR("Failed to allocate pipe control page\n");
- ret = PTR_ERR(obj);
- goto err;
+ return PTR_ERR(obj);
}
-
- pc->gtt_offset = obj->gtt_offset;
- pc->cpu_page = obj->cpu_map;
- if (pc->cpu_page == NULL) {
- ret = -ENOMEM;
- goto err;
- }
-
- pc->obj = obj;
- ring->private = pc;
+ ring->private = obj;
return 0;
-
-err:
- kfree(pc);
- return ret;
}
static void
cleanup_pipe_control(struct intel_ring_buffer *ring)
{
- struct pipe_control *pc = ring->private;
struct drm_i915_gem_object *obj;
if (!ring->private)
return;
- obj = pc->obj;
+ obj = ring->private;
ring_destroy_object(obj);
- kfree(pc);
ring->private = NULL;
}
@@ -599,9 +567,9 @@ static int
pc_render_add_request(struct intel_ring_buffer *ring,
u32 *result)
{
+ struct drm_i915_gem_object *obj = ring->private;
u32 seqno = i915_gem_next_request_seqno(ring);
- struct pipe_control *pc = ring->private;
- u32 scratch_addr = pc->gtt_offset + 128;
+ u32 scratch_addr = obj->gtt_offset + 128;
int ret;
/* For Ironlake, MI_USER_INTERRUPT was deprecated and apparently
@@ -619,7 +587,7 @@ pc_render_add_request(struct intel_ring_buffer *ring,
intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE |
PIPE_CONTROL_WRITE_FLUSH |
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
- intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
+ intel_ring_emit(ring, obj->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
intel_ring_emit(ring, seqno);
intel_ring_emit(ring, 0);
PIPE_CONTROL_FLUSH(ring, scratch_addr);
@@ -638,7 +606,7 @@ pc_render_add_request(struct intel_ring_buffer *ring,
PIPE_CONTROL_WRITE_FLUSH |
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_NOTIFY);
- intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
+ intel_ring_emit(ring, obj->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
intel_ring_emit(ring, seqno);
intel_ring_emit(ring, 0);
intel_ring_advance(ring);
@@ -669,8 +637,8 @@ ring_get_seqno(struct intel_ring_buffer *ring)
static u32
pc_render_get_seqno(struct intel_ring_buffer *ring)
{
- struct pipe_control *pc = ring->private;
- return pc->cpu_page[0];
+ struct drm_i915_gem_object *obj = ring->private;
+ return ((volatile u32 *)obj->cpu_map)[0];
}
static bool
--
1.7.11.1
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