On Tue, May 09, 2017 at 01:05:22PM +0300, Mika Kuoppala wrote:
> The assumption is that the registers offsets are
> identical as with skl. Also all the published
> kbl firmwares support the debug registers. So
> let kbl show the debug counts.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100975
> Cc: Imre Deak <imre.d...@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuopp...@intel.com>
Reviewed-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 1003511..34785fb 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2853,7 +2853,8 @@ static int i915_dmc_info(struct seq_file *m, void
> *unused)
> seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
> CSR_VERSION_MINOR(csr->version));
>
> - if (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6)) {
> + if (IS_KABYLAKE(dev_priv) ||
> + (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
> seq_printf(m, "DC3 -> DC5 count: %d\n",
> I915_READ(SKL_CSR_DC3_DC5_COUNT));
> seq_printf(m, "DC5 -> DC6 count: %d\n",
> --
> 2.7.4
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
