On Thu, Apr 06, 2017 at 12:15:17PM -0700, Rodrigo Vivi wrote:
> From: Ben Widawsky <benjamin.widaw...@intel.com>
>
> The docs are not yet correct, so I cannot provide a reference to it. In the
> current docs, the size is actually smaller than SKL. This seems unlikely given
> that in another part of the docs there are clearly more engines stored within
> the context image.
>
> !UPSTREAM: I got this number from the Windows driver, but we should add the
> right
> reference to the docs when we have it..
>
> v2: (Rodrigo) Fixup the missing break identified by Tvrtko.
>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> Signed-off-by: Ben Widawsky <benjamin.widaw...@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 23e2bed..058d5f2 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -138,6 +138,7 @@
> #include "i915_drv.h"
> #include "intel_mocs.h"
>
> +#define GEN10_LR_CONTEXT_RENDER_SIZE ((1 + 33) * PAGE_SIZE)
> #define GEN9_LR_CONTEXT_RENDER_SIZE (22 * PAGE_SIZE)
> #define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
> #define GEN8_LR_CONTEXT_OTHER_SIZE (2 * PAGE_SIZE)
> @@ -1930,10 +1931,19 @@ uint32_t intel_lr_context_size(struct intel_engine_cs
> *engine)
>
> switch (engine->id) {
> case RCS:
> - if (INTEL_GEN(engine->i915) >= 9)
> + switch (INTEL_GEN(engine->i915)) {
> + default:
> + DRM_ERROR("Unknown context size for GEN\n");
MISSING_CASE(INTEL_GEN(engine->i915));
/* fall through */
> + case 10:
> + ret = GEN10_LR_CONTEXT_RENDER_SIZE;
> + break;
> + case 9:
> ret = GEN9_LR_CONTEXT_RENDER_SIZE;
> - else
> + break;
> + case 8:
> ret = GEN8_LR_CONTEXT_RENDER_SIZE;
> + break;
> + }
> break;
> case VCS:
> case BCS:
> --
> 1.9.1
>
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--
Chris Wilson, Intel Open Source Technology Centre
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