On Wed, 20 Jun 2012 14:57:17 +0200 Daniel Vetter <dan...@ffwll.ch> wrote:
> On Fri, Jun 15, 2012 at 11:55:19AM -0700, Jesse Barnes wrote: > > The PTE format is similar to SNB, but we don't support an MLC and don't > > need chipset flushing. > > > > Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org> > > I have my questions whether this is right, given that MLC died for snb & > ivb, that ivb has grown a L3$ cache instead (which vlv seems to have, too) > and that the LLC bit here isn't actually LLC, but just means 'snoop cpu > caches'. Yeah I dropped the MLC part and didn't rename the LLC bit which might be a little confusing, but afaict from the VLV docs this is correct and actually works here (i.e. my last "cacheability is different" patch is unneeded). -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
