On Thu, Mar 16, 2017 at 11:44:10AM +0530, sourab.gu...@intel.com wrote:
> +static void i915_perf_command_stream_hook_oa(struct i915_perf_stream *stream,
> +                                     struct drm_i915_gem_request *request)
> +{
> +     struct drm_i915_private *dev_priv = request->i915;
> +     struct i915_gem_context *ctx = request->ctx;
> +     struct i915_perf_cs_sample *sample;
> +     u32 addr = 0;
> +     u32 cmd, *cs;
> +
> +     sample = kzalloc(sizeof(*sample), GFP_KERNEL);
> +     if (sample == NULL) {
> +             DRM_ERROR("Perf sample alloc failed\n");
> +             return;
> +     }
> +
> +     cs = intel_ring_begin(request, 4);
> +     if (IS_ERR(cs)) {
> +             kfree(sample);
> +             return;
> +     }
> +
> +     sample->ctx_id = ctx->hw_id;
> +     i915_gem_request_assign(&sample->request, request);
> +
> +     insert_perf_sample(dev_priv, sample);
> +
> +     addr = dev_priv->perf.command_stream_buf.vma->node.start +
> +             sample->offset;
> +
> +     if (WARN_ON(addr & 0x3f)) {
> +             DRM_ERROR("OA buffer address not aligned to 64 byte");
> +             return;
> +     }
> +
> +     cmd = MI_REPORT_PERF_COUNT | (1<<0);
> +     if (INTEL_GEN(dev_priv) >= 8)
> +             cmd |= (2<<0);
> +
> +     *cs++ = cmd;
> +     *cs++ = addr | MI_REPORT_PERF_COUNT_GGTT;
> +     *cs++ = request->global_seqno;

request->global_seqno is always zero at this point, and is subject to
change after assignment.

[ctx:engine or request->fence.context]:request->fence.seqno is permanent.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to