As a w/a to prevent reads sporadically returning 0, we need to wait for the GT thread to return to TC0 before proceeding to read the registers.
References: https://bugs.freedesktop.org/show_bug.cgi?id=50243 Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2058316..ba3f1a9 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -424,6 +424,19 @@ bool i915_semaphore_is_enabled(struct drm_device *dev) return 1; } +static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv) +{ + unsigned long timeout; + + /* w/a for a sporadic read returning 0 by waiting for the GT + * thread to wake up. + */ + timeout = jiffies + msecs_to_jiffies(1); + while (I915_READ_NOTRACE(GEN6_GT_THREAD_STATUS_REG) & GEN6_GT_THREAD_STATUS_CORE_MASK && + time_before(jiffies, timeout)) + ; +} + static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) { unsigned long timeout; @@ -439,6 +452,8 @@ static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) while ((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0 && time_before(jiffies, timeout)) ; + + __gen6_gt_wait_for_thread_c0(dev_priv); } static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) @@ -456,6 +471,8 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) while ((I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0 && time_before(jiffies, timeout)) ; + + __gen6_gt_wait_for_thread_c0(dev_priv); } /* @@ -546,6 +563,8 @@ static void vlv_force_wake_get(struct drm_i915_private *dev_priv) count = 0; while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0) udelay(10); + + __gen6_gt_wait_for_thread_c0(dev_priv); } static void vlv_force_wake_put(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 23f8954..b51414e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1443,6 +1443,9 @@ #define DDRMPLL1 0X12c20 #define PEG_BAND_GAP_DATA 0x14d68 +#define GEN6_GT_THREAD_STATUS_REG 0x13805c +#define GEN6_GT_THREAD_STATUS_CORE_MASK 0x7 + #define GEN6_GT_PERF_STATUS 0x145948 #define GEN6_RP_STATE_LIMITS 0x145994 #define GEN6_RP_STATE_CAP 0x145998 -- 1.7.10 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
