Mostly done with coccinelle,
@@
expression x;
@@
(
- (1<<x)
+ BIT(x)
|
- (1 << x)
+ BIT(x)
|
- 1 << x
+ BIT(x)
|
- (1UL<<x)
+ BIT(x)
|
- (1UL << x)
+ BIT(x)
|
- 1UL << x
+ BIT(x)
|
- (1ULL<<x)
+ BIT_ULL(x)
|
- (1ULL << x)
+ BIT_ULL(x)
|
- 1ULL << x
+ BIT_ULL(x)
)
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
tests/drm_vma_limiter_cached.c | 2 +-
tests/drv_missed_irq.c | 4 +-
tests/drv_module_reload.c | 4 +-
tests/eviction_common.c | 8 ++--
tests/gem_bad_address.c | 2 +-
tests/gem_bad_reloc.c | 6 +--
tests/gem_busy.c | 24 ++++++------
tests/gem_close_race.c | 8 ++--
tests/gem_concurrent_all.c | 2 +-
tests/gem_cpu_reloc.c | 4 +-
tests/gem_create.c | 2 +-
tests/gem_cs_prefetch.c | 2 +-
tests/gem_cs_tlb.c | 2 +-
tests/gem_ctx_switch.c | 4 +-
tests/gem_ctx_thrash.c | 2 +-
tests/gem_double_irq_loop.c | 4 +-
tests/gem_exec_alignment.c | 6 +--
tests/gem_exec_async.c | 8 ++--
tests/gem_exec_blt.c | 20 +++++-----
tests/gem_exec_create.c | 4 +-
tests/gem_exec_faulting_reloc.c | 14 +++----
tests/gem_exec_fence.c | 14 +++----
tests/gem_exec_flush.c | 10 ++---
tests/gem_exec_gttfill.c | 4 +-
tests/gem_exec_latency.c | 8 ++--
tests/gem_exec_lut_handle.c | 4 +-
tests/gem_exec_nop.c | 4 +-
tests/gem_exec_parallel.c | 6 +--
tests/gem_exec_params.c | 8 ++--
tests/gem_exec_parse.c | 4 +-
tests/gem_exec_reloc.c | 8 ++--
tests/gem_exec_reuse.c | 4 +-
tests/gem_exec_schedule.c | 6 +--
tests/gem_exec_store.c | 4 +-
tests/gem_exec_suspend.c | 6 +--
tests/gem_exec_whisper.c | 10 ++---
tests/gem_fence_upload.c | 4 +-
tests/gem_fenced_exec_thrash.c | 4 +-
tests/gem_gtt_hog.c | 4 +-
tests/gem_lut_handle.c | 2 +-
tests/gem_persistent_relocs.c | 10 ++---
tests/gem_pin.c | 6 +--
tests/gem_pipe_control_store_loop.c | 18 ++++-----
tests/gem_pwrite.c | 8 ++--
tests/gem_pwrite_pread.c | 12 +++---
tests/gem_reloc_vs_gpu.c | 12 +++---
tests/gem_reset_stats.c | 6 +--
tests/gem_ringfill.c | 6 +--
tests/gem_shrink.c | 4 +-
tests/gem_softpin.c | 12 +++---
tests/gem_storedw_batches_loop.c | 2 +-
tests/gem_streaming_writes.c | 10 ++---
tests/gem_stress.c | 8 ++--
tests/gem_sync.c | 10 ++---
tests/gem_tiled_pread_basic.c | 2 +-
tests/gem_tiled_wb.c | 2 +-
tests/gem_tiled_wc.c | 2 +-
tests/gem_write_read_ring_switch.c | 4 +-
tests/gen3_mixed_blits.c | 6 +--
tests/gen3_render_linear_blits.c | 6 +--
tests/gen3_render_mixed_blits.c | 6 +--
tests/gen3_render_tiledx_blits.c | 6 +--
tests/gen3_render_tiledy_blits.c | 6 +--
tests/gen7_forcewake_mt.c | 2 +-
tests/kms_atomic.c | 6 +--
tests/kms_atomic_transition.c | 20 +++++-----
tests/kms_ccs.c | 8 ++--
tests/kms_cursor_crc.c | 4 +-
tests/kms_cursor_legacy.c | 4 +-
tests/kms_fbc_crc.c | 2 +-
tests/kms_flip.c | 74 ++++++++++++++++++-------------------
tests/kms_frontbuffer_tracking.c | 26 ++++++-------
tests/kms_pipe_color.c | 6 +--
tests/kms_pipe_crc_basic.c | 4 +-
tests/kms_plane.c | 10 ++---
tests/kms_psr_sink_crc.c | 2 +-
tests/kms_render.c | 2 +-
tests/kms_setmode.c | 11 +++---
tests/perf.c | 52 +++++++++++++-------------
tests/pm_rpm.c | 8 ++--
tests/pm_rps.c | 4 +-
tests/pm_sseu.c | 4 +-
tests/prime_busy.c | 6 +--
tests/prime_nv_pcopy.c | 4 +-
tests/prime_vgem.c | 8 ++--
tests/sw_sync.c | 8 ++--
tests/testdisplay.c | 2 +-
tests/vgem_basic.c | 8 ++--
88 files changed, 347 insertions(+), 348 deletions(-)
diff --git a/tests/drm_vma_limiter_cached.c b/tests/drm_vma_limiter_cached.c
index a47c7970..d248217c 100644
--- a/tests/drm_vma_limiter_cached.c
+++ b/tests/drm_vma_limiter_cached.c
@@ -110,7 +110,7 @@ igt_simple_main
OUT_BATCH((3 << 24) | /* 32 bits */
128);
OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((1 << 16) | 1);
+ OUT_BATCH(BIT(16) | 1);
OUT_RELOC(bo[j], I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0xffffffff); /* color */
ADVANCE_BATCH();
diff --git a/tests/drv_missed_irq.c b/tests/drv_missed_irq.c
index 2766c346..05f58567 100644
--- a/tests/drv_missed_irq.c
+++ b/tests/drv_missed_irq.c
@@ -58,11 +58,11 @@ static void trigger_missed_interrupt(int fd, unsigned ring)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/drv_module_reload.c b/tests/drv_module_reload.c
index 32e1324b..3a7e73eb 100644
--- a/tests/drv_module_reload.c
+++ b/tests/drv_module_reload.c
@@ -88,7 +88,7 @@ static void store_dword(int fd, unsigned ring)
obj[1].relocation_count = 1;
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
@@ -142,7 +142,7 @@ static void store_all(int fd)
offset = sizeof(uint32_t);
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
diff --git a/tests/eviction_common.c b/tests/eviction_common.c
index e39555de..13502f6f 100644
--- a/tests/eviction_common.c
+++ b/tests/eviction_common.c
@@ -40,10 +40,10 @@ struct igt_eviction_test_ops {
void (*clear)(int fd, uint32_t bo, uint64_t size);
};
-#define FORKING_EVICTIONS_INTERRUPTIBLE (1 << 0)
-#define FORKING_EVICTIONS_SWAPPING (1 << 1)
-#define FORKING_EVICTIONS_DUP_DRMFD (1 << 2)
-#define FORKING_EVICTIONS_MEMORY_PRESSURE (1 << 3)
+#define FORKING_EVICTIONS_INTERRUPTIBLE BIT(0)
+#define FORKING_EVICTIONS_SWAPPING BIT(1)
+#define FORKING_EVICTIONS_DUP_DRMFD BIT(2)
+#define FORKING_EVICTIONS_MEMORY_PRESSURE BIT(3)
#define ALL_FORKING_EVICTIONS (FORKING_EVICTIONS_INTERRUPTIBLE | \
FORKING_EVICTIONS_SWAPPING | \
FORKING_EVICTIONS_DUP_DRMFD | \
diff --git a/tests/gem_bad_address.c b/tests/gem_bad_address.c
index a970dfa4..19cbad0c 100644
--- a/tests/gem_bad_address.c
+++ b/tests/gem_bad_address.c
@@ -47,7 +47,7 @@ static void
bad_store(void)
{
BEGIN_BATCH(4, 0);
- OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | 1 << 21);
+ OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | BIT(21));
OUT_BATCH(0);
OUT_BATCH(BAD_GTT_DEST);
OUT_BATCH(0xdeadbeef);
diff --git a/tests/gem_bad_reloc.c b/tests/gem_bad_reloc.c
index 2351ce91..a3b07bb7 100644
--- a/tests/gem_bad_reloc.c
+++ b/tests/gem_bad_reloc.c
@@ -42,7 +42,7 @@
IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
" for STATE_BASE_ADDRESS command packets.");
-#define USE_LUT (1 << 12)
+#define USE_LUT BIT(12)
#define BIAS (256*1024)
/* Simulates SNA behaviour using negative self-relocations for
@@ -137,8 +137,8 @@ static void negative_reloc_blt(int fd)
*b++ = XY_COLOR_BLT_CMD_NOLEN |
((gen >= 8) ? 5 : 4) |
COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
- *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096;
- *b++ = 1 << 16 | 0;
+ *b++ = 0xf0 << 16 | BIT(25) | BIT(24) | 4096;
+ *b++ = BIT(16) | 0;
*b++ = 2 << 16 | 1024;
*b++ = ~0;
if (gen >= 8)
diff --git a/tests/gem_busy.c b/tests/gem_busy.c
index 39360109..af79154c 100644
--- a/tests/gem_busy.c
+++ b/tests/gem_busy.c
@@ -24,7 +24,7 @@
#include "igt.h"
#include "igt_rand.h"
-#define LOCAL_EXEC_NO_RELOC (1<<11)
+#define LOCAL_EXEC_NO_RELOC BIT(11)
/* Exercise the busy-ioctl, ensuring the ABI is never broken */
IGT_TEST_DESCRIPTION("Basic check of busy-ioctl ABI.");
@@ -80,14 +80,14 @@ static uint32_t busy_blt(int fd)
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
while (factor--) {
/* XY_SRC_COPY */
map[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
if (has_64bit_reloc)
map[i-1] += 2;
- map[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024);
+ map[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (4*1024);
map[i++] = 0;
map[i++] = 256 << 16 | 1024;
@@ -185,21 +185,21 @@ static void semaphore(int fd, unsigned ring, uint32_t
flags)
igt_assert(exec_noop(fd, handle, ring | flags, false));
igt_assert(still_busy(fd, handle[BUSY]));
__gem_busy(fd, handle[TEST], &read, &write);
- igt_assert_eq(read, 1 << ring);
+ igt_assert_eq(read, BIT(ring));
igt_assert_eq(write, 0);
/* Requeue with a write */
igt_assert(exec_noop(fd, handle, ring | flags, true));
igt_assert(still_busy(fd, handle[BUSY]));
__gem_busy(fd, handle[TEST], &read, &write);
- igt_assert_eq(read, 1 << ring);
+ igt_assert_eq(read, BIT(ring));
igt_assert_eq(write, ring);
/* Now queue it for a read across all available rings */
active = 0;
for (i = I915_EXEC_RENDER; i <= I915_EXEC_VEBOX; i++) {
if (exec_noop(fd, handle, i | flags, false))
- active |= 1 << i;
+ active |= BIT(i);
}
igt_assert(still_busy(fd, handle[BUSY]));
__gem_busy(fd, handle[TEST], &read, &write);
@@ -262,7 +262,7 @@ static void one(int fd, unsigned ring, uint32_t flags,
unsigned test_flags)
store[count].delta = sizeof(uint32_t) * count;
store[count].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
store[count].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
@@ -287,11 +287,11 @@ static void one(int fd, unsigned ring, uint32_t flags,
unsigned test_flags)
store[count].write_domain = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
@@ -335,10 +335,10 @@ static void one(int fd, unsigned ring, uint32_t flags,
unsigned test_flags)
}
igt_assert_eq(write[SCRATCH], ring);
- igt_assert_eq_u32(read[SCRATCH], 1 << ring);
+ igt_assert_eq_u32(read[SCRATCH], BIT(ring));
igt_assert_eq(write[BATCH], 0);
- igt_assert_eq_u32(read[BATCH], 1 << ring);
+ igt_assert_eq_u32(read[BATCH], BIT(ring));
/* Calling busy in a loop should be enough to flush the rendering */
memset(&tv, 0, sizeof(tv));
diff --git a/tests/gem_close_race.c b/tests/gem_close_race.c
index 05e95547..1ef94d61 100644
--- a/tests/gem_close_race.c
+++ b/tests/gem_close_race.c
@@ -45,8 +45,8 @@
#define OBJECT_SIZE (256 * 1024)
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
static uint32_t devid;
static bool has_64bit_relocations;
@@ -69,9 +69,9 @@ static void selfcopy(int fd, uint32_t handle, int loops)
if (has_64bit_relocations)
*b += 2;
b++;
- *b++ = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024);
+ *b++ = 0xcc << 16 | BIT(25) | BIT(24) | (4*1024);
*b++ = 0;
- *b++ = 1 << 16 | 1024;
+ *b++ = BIT(16) | 1024;
reloc[0].offset = (b - buf) * sizeof(*b);
reloc[0].target_handle = handle;
diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
index 66250849..6ef83a93 100644
--- a/tests/gem_concurrent_all.c
+++ b/tests/gem_concurrent_all.c
@@ -651,7 +651,7 @@ gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo,
uint32_t val)
*b = buffers->width;
} else
*b = buffers->width << 2;
- *b++ |= 0xf0 << 16 | 1 << 25 | 1 << 24;
+ *b++ |= 0xf0 << 16 | BIT(25) | BIT(24);
*b++ = 0;
*b++ = buffers->height << 16 | buffers->width;
reloc[0].offset = (b - buf) * sizeof(uint32_t);
diff --git a/tests/gem_cpu_reloc.c b/tests/gem_cpu_reloc.c
index 4e4458d2..e73fd417 100644
--- a/tests/gem_cpu_reloc.c
+++ b/tests/gem_cpu_reloc.c
@@ -125,7 +125,7 @@ uint32_t gen6_batch[] = {
0xcc << 16 | /* copy ROP */
4096),
0 << 16 | 0, /* dst x1, y1 */
- 1 << 16 | 2,
+ BIT(16) | 2,
0, /* dst relocation */
0 << 16 | 0, /* src x1, y1 */
4096,
@@ -141,7 +141,7 @@ uint32_t gen8_batch[] = {
0xcc << 16 | /* copy ROP */
4096),
0 << 16 | 0, /* dst x1, y1 */
- 1 << 16 | 2,
+ BIT(16) | 2,
0, /* dst relocation */
0, /* FIXME */
0 << 16 | 0, /* src x1, y1 */
diff --git a/tests/gem_create.c b/tests/gem_create.c
index 4036dbe6..87d121a2 100644
--- a/tests/gem_create.c
+++ b/tests/gem_create.c
@@ -69,7 +69,7 @@ struct local_i915_gem_create_v2 {
uint64_t size;
uint32_t handle;
uint32_t pad;
-#define I915_CREATE_PLACEMENT_STOLEN (1<<0)
+#define I915_CREATE_PLACEMENT_STOLEN BIT(0)
uint32_t flags;
} create;
diff --git a/tests/gem_cs_prefetch.c b/tests/gem_cs_prefetch.c
index fd9bb793..9f72a366 100644
--- a/tests/gem_cs_prefetch.c
+++ b/tests/gem_cs_prefetch.c
@@ -62,7 +62,7 @@ static void setup(int fd, int gen, struct shadow *shadow)
shadow->handle = gem_create(fd, 4096);
i = 0;
- buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
buf[i++] = BATCH_SIZE - sizeof(uint32_t);
buf[i++] = 0;
diff --git a/tests/gem_cs_tlb.c b/tests/gem_cs_tlb.c
index 0338a1e0..670dc1ce 100644
--- a/tests/gem_cs_tlb.c
+++ b/tests/gem_cs_tlb.c
@@ -53,7 +53,7 @@
IGT_TEST_DESCRIPTION("Check whether we correctly invalidate the cs tlb.");
#define LOCAL_I915_EXEC_VEBOX (4<<0)
-#define EXEC_OBJECT_PINNED (1<<4)
+#define EXEC_OBJECT_PINNED BIT(4)
#define BATCH_SIZE (1024*1024)
static bool has_softpin(int fd)
diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 00122806..cad0fd77 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -40,8 +40,8 @@
#include <time.h>
#include "drm.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define INTERRUPTIBLE 1
diff --git a/tests/gem_ctx_thrash.c b/tests/gem_ctx_thrash.c
index cc7ea1a7..2908f391 100644
--- a/tests/gem_ctx_thrash.c
+++ b/tests/gem_ctx_thrash.c
@@ -212,7 +212,7 @@ static void single(const char *name, bool all_engines)
buf[++i] = offset >> 32;
} else if (gen >= 4) {
if (gen < 6)
- buf[i] |= 1 << 22;
+ buf[i] |= BIT(22);
buf[++i] = 0;
buf[++i] = offset;
} else {
diff --git a/tests/gem_double_irq_loop.c b/tests/gem_double_irq_loop.c
index 71ed3b0c..21ae2563 100644
--- a/tests/gem_double_irq_loop.c
+++ b/tests/gem_double_irq_loop.c
@@ -53,7 +53,7 @@ IGT_TEST_DESCRIPTION("Basic check for missed IRQs on blt
ring.");
#define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1)
-#define MI_DO_COMPARE (1<<21)
+#define MI_DO_COMPARE BIT(21)
static void
dummy_reloc_loop(void)
{
@@ -78,7 +78,7 @@ dummy_reloc_loop(void)
OUT_BATCH(0); /* reserved */
OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(MI_NOOP | (1<<22) | (0xf));
+ OUT_BATCH(MI_NOOP | BIT(22) | (0xf));
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
diff --git a/tests/gem_exec_alignment.c b/tests/gem_exec_alignment.c
index 0549af33..2d3bb1d7 100644
--- a/tests/gem_exec_alignment.c
+++ b/tests/gem_exec_alignment.c
@@ -100,11 +100,11 @@ static void many(int fd)
for (i = 0; i < count; i++) {
execobj[i].handle = gem_create(fd, 4096);
if ((gtt_size-1) >> 32)
- execobj[i].flags = 1<<3; /*
EXEC_OBJECT_SUPPORTS_48B_ADDRESS */
+ execobj[i].flags = BIT(3); /*
EXEC_OBJECT_SUPPORTS_48B_ADDRESS */
}
execobj[i].handle = gem_create(fd, 4096);
if ((gtt_size-1) >> 32)
- execobj[i].flags = 1<<3; /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */
+ execobj[i].flags = BIT(3); /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS
*/
gem_write(fd, execobj[i].handle, 0, &bbe, sizeof(bbe));
memset(&execbuf, 0, sizeof(execbuf));
@@ -149,7 +149,7 @@ static void single(int fd)
memset(&execobj, 0, sizeof(execobj));
execobj.handle = gem_create(fd, 4096);
- execobj.flags = 1<<3; /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */
+ execobj.flags = BIT(3); /* EXEC_OBJECT_SUPPORTS_48B_ADDRESS */
gem_write(fd, execobj.handle, 0, &batch, sizeof(batch));
memset(&execbuf, 0, sizeof(execbuf));
diff --git a/tests/gem_exec_async.c b/tests/gem_exec_async.c
index 5b379cdf..802d767a 100644
--- a/tests/gem_exec_async.c
+++ b/tests/gem_exec_async.c
@@ -23,7 +23,7 @@
#include "igt.h"
-#define LOCAL_OBJECT_ASYNC (1 << 6)
+#define LOCAL_OBJECT_ASYNC BIT(6)
#define LOCAL_PARAM_HAS_EXEC_ASYNC 43
IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the
engines.");
@@ -61,7 +61,7 @@ static void store_dword(int fd, unsigned ring,
obj[1].relocation_count = 1;
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = offset;
batch[++i] = 0;
@@ -118,11 +118,11 @@ static void one(int fd, unsigned ring, uint32_t flags)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/gem_exec_blt.c b/tests/gem_exec_blt.c
index 932884b0..15da3798 100644
--- a/tests/gem_exec_blt.c
+++ b/tests/gem_exec_blt.c
@@ -42,13 +42,13 @@
#define OBJECT_SIZE 16384
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
-#define BLT_SRC_TILED (1<<15)
-#define BLT_DST_TILED (1<<11)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
+#define BLT_SRC_TILED BIT(15)
+#define BLT_DST_TILED BIT(11)
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
static int gem_linear_blt(int fd,
uint32_t *batch,
@@ -60,14 +60,14 @@ static int gem_linear_blt(int fd,
uint32_t *b = batch;
int height = length / (16 * 1024);
- igt_assert_lte(height, 1 << 16);
+ igt_assert_lte(height, BIT(16));
if (height) {
int i = 0;
b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
if (intel_gen(intel_get_drm_devid(fd)) >= 8)
b[i-1]+=2;
- b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
+ b[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (16*1024);
b[i++] = 0;
b[i++] = height << 16 | (4*1024);
b[i++] = 0;
@@ -105,7 +105,7 @@ static int gem_linear_blt(int fd,
b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
if (intel_gen(intel_get_drm_devid(fd)) >= 8)
b[i-1]+=2;
- b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
+ b[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (16*1024);
b[i++] = height << 16;
b[i++] = (1+height) << 16 | (length / 4);
b[i++] = 0;
@@ -235,7 +235,7 @@ static void run(int object_size, bool dumb)
}
gem_sync(fd, handle);
- for (count = 1; count <= 1<<12; count <<= 1) {
+ for (count = 1; count <= BIT(12); count <<= 1) {
struct timeval start, end;
const int reps = 9;
double t[reps], sum;
diff --git a/tests/gem_exec_create.c b/tests/gem_exec_create.c
index 25926150..19e2abcf 100644
--- a/tests/gem_exec_create.c
+++ b/tests/gem_exec_create.c
@@ -40,8 +40,8 @@
#include <time.h>
#include "drm.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
diff --git a/tests/gem_exec_faulting_reloc.c b/tests/gem_exec_faulting_reloc.c
index c17ce2da..3a631f45 100644
--- a/tests/gem_exec_faulting_reloc.c
+++ b/tests/gem_exec_faulting_reloc.c
@@ -50,10 +50,10 @@ IGT_TEST_DESCRIPTION("Submit patches with relocations in
memory that will"
#define OBJECT_SIZE 16384
#define COPY_BLT_CMD_NOLEN (2<<29|0x53<<22)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
-#define BLT_SRC_TILED (1<<15)
-#define BLT_DST_TILED (1<<11)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
+#define BLT_SRC_TILED BIT(15)
+#define BLT_DST_TILED BIT(11)
uint32_t devid;
@@ -66,7 +66,7 @@ static int gem_linear_blt(uint32_t *batch,
uint32_t *b = batch;
int height = length / (16 * 1024);
- igt_assert_lte(height, 1 << 16);
+ igt_assert_lte(height, BIT(16));
if (height) {
int i = 0;
@@ -75,7 +75,7 @@ static int gem_linear_blt(uint32_t *batch,
b[i-1] |= 8;
else
b[i-1] |= 6;
- b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
+ b[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (16*1024);
b[i++] = 0;
b[i++] = height << 16 | (4*1024);
b[i++] = 0;
@@ -119,7 +119,7 @@ static int gem_linear_blt(uint32_t *batch,
b[i-1] |= 8;
else
b[i-1] |= 6;
- b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
+ b[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (16*1024);
b[i++] = height << 16;
b[i++] = (1+height) << 16 | (length / 4);
b[i++] = 0;
diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index ddc5e7f2..974c6849 100644
--- a/tests/gem_exec_fence.c
+++ b/tests/gem_exec_fence.c
@@ -30,8 +30,8 @@
IGT_TEST_DESCRIPTION("Check that execbuf waits for explicit fences");
#define LOCAL_PARAM_HAS_EXEC_FENCE 44
-#define LOCAL_EXEC_FENCE_IN (1 << 16)
-#define LOCAL_EXEC_FENCE_OUT (1 << 17)
+#define LOCAL_EXEC_FENCE_IN BIT(16)
+#define LOCAL_EXEC_FENCE_OUT BIT(17)
#define LOCAL_IOCTL_I915_GEM_EXECBUFFER2_WR DRM_IOWR(DRM_COMMAND_BASE +
DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
static bool can_mi_store_dword(int gen, unsigned engine)
@@ -73,7 +73,7 @@ static void store(int fd, unsigned ring, int fence, uint32_t
target, unsigned of
reloc.delta = sizeof(uint32_t) * offset_value;
reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = reloc.delta;
batch[++i] = 0;
@@ -153,11 +153,11 @@ static void test_fence_busy(int fd, unsigned ring,
unsigned flags)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
@@ -245,11 +245,11 @@ static void test_fence_await(int fd, unsigned ring,
unsigned flags)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/gem_exec_flush.c b/tests/gem_exec_flush.c
index 4b51fbb0..4c417070 100644
--- a/tests/gem_exec_flush.c
+++ b/tests/gem_exec_flush.c
@@ -162,7 +162,7 @@ static void run(int fd, unsigned ring, int nchild, int
timeout,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 3;
- execbuf.flags = ring | (1 << 11) | (1<<12);
+ execbuf.flags = ring | BIT(11) | BIT(12);
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -191,7 +191,7 @@ static void run(int fd, unsigned ring, int nchild, int
timeout,
reloc0[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
offset = obj[0].offset + reloc0[i].delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
@@ -225,7 +225,7 @@ static void run(int fd, unsigned ring, int nchild, int
timeout,
reloc1[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
offset = obj[0].offset + reloc1[i].delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
@@ -394,7 +394,7 @@ static void batch(int fd, unsigned ring, int nchild, int
timeout,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 2;
- execbuf.flags = ring | (1 << 11) | (1<<12);
+ execbuf.flags = ring | BIT(11) | BIT(12);
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -464,7 +464,7 @@ static void batch(int fd, unsigned ring, int nchild, int
timeout,
reloc.delta = i * sizeof(uint32_t);
offset = reloc.presumed_offset + reloc.delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22
: 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22)
: 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
diff --git a/tests/gem_exec_gttfill.c b/tests/gem_exec_gttfill.c
index 6ab88b15..cf4fb2a9 100644
--- a/tests/gem_exec_gttfill.c
+++ b/tests/gem_exec_gttfill.c
@@ -78,9 +78,9 @@ static void submit(int fd, int gen,
reloc[1].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
n = 0;
- batch[n] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[n] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
- batch[n] |= 1 << 21;
+ batch[n] |= BIT(21);
batch[n]++;
batch[++n] = reloc[0].delta;/* lower_32_bits(address) */
batch[++n] = 0; /* upper_32_bits(address) */
diff --git a/tests/gem_exec_latency.c b/tests/gem_exec_latency.c
index 6e6cc57b..d62466f4 100644
--- a/tests/gem_exec_latency.c
+++ b/tests/gem_exec_latency.c
@@ -41,8 +41,8 @@
#include "igt_sysfs.h"
#include "igt_vgem.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
@@ -191,11 +191,11 @@ static void latency_on_ring(int fd,
i = 16 * j + (has_64bit_reloc ? 4 : 3);
map[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- map[i] |= 1 << 8 | 1;
+ map[i] |= BIT(8) | 1;
map[i + 1] = offset;
map[i + 2] = offset >> 32;
} else if (gen >= 6) {
- map[i] |= 1 << 8;
+ map[i] |= BIT(8);
map[i + 1] = offset;
} else {
map[i] |= 2 << 6;
diff --git a/tests/gem_exec_lut_handle.c b/tests/gem_exec_lut_handle.c
index 09b55b9e..6ab25ed4 100644
--- a/tests/gem_exec_lut_handle.c
+++ b/tests/gem_exec_lut_handle.c
@@ -43,8 +43,8 @@ IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using
the handle LUT"
#define BATCH_SIZE (1024*1024)
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define MAX_NUM_EXEC 2048
#define MAX_NUM_RELOC 4096
diff --git a/tests/gem_exec_nop.c b/tests/gem_exec_nop.c
index 0d7a4d06..9f05edb8 100644
--- a/tests/gem_exec_nop.c
+++ b/tests/gem_exec_nop.c
@@ -43,8 +43,8 @@
#include <time.h>
#include "drm.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
diff --git a/tests/gem_exec_parallel.c b/tests/gem_exec_parallel.c
index 3be5017a..d7000cd8 100644
--- a/tests/gem_exec_parallel.c
+++ b/tests/gem_exec_parallel.c
@@ -32,8 +32,8 @@
#include "igt.h"
#include "igt_gt.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
@@ -121,7 +121,7 @@ static void *thread(void *data)
fd = t->fd;
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (t->gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (t->gen < 6 ? BIT(22) : 0);
if (t->gen >= 8) {
batch[++i] = 4*t->id;
batch[++i] = 0;
diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c
index fbc0ab30..082bf5f8 100644
--- a/tests/gem_exec_params.c
+++ b/tests/gem_exec_params.c
@@ -42,11 +42,11 @@
#define LOCAL_I915_EXEC_VEBOX (4<<0)
#define LOCAL_I915_EXEC_BSD_MASK (3<<13)
-#define LOCAL_I915_EXEC_BSD_RING1 (1<<13)
+#define LOCAL_I915_EXEC_BSD_RING1 BIT(13)
#define LOCAL_I915_EXEC_BSD_RING2 (2<<13)
-#define LOCAL_I915_EXEC_RESOURCE_STREAMER (1<<15)
-#define LOCAL_I915_EXEC_FENCE_IN (1 << 16)
-#define LOCAL_I915_EXEC_FENCE_OUT (1 << 17)
+#define LOCAL_I915_EXEC_RESOURCE_STREAMER BIT(15)
+#define LOCAL_I915_EXEC_FENCE_IN BIT(16)
+#define LOCAL_I915_EXEC_FENCE_OUT BIT(17)
static bool has_ring(int fd, unsigned ring_exec_flags)
{
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index ea39c481..3d51ba03 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -53,8 +53,8 @@
#define MI_DISPLAY_FLIP ((0x14 << 23) | 1)
#define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2)
-#define PIPE_CONTROL_QW_WRITE (1<<14)
-#define PIPE_CONTROL_LRI_POST_OP (1<<23)
+#define PIPE_CONTROL_QW_WRITE BIT(14)
+#define PIPE_CONTROL_LRI_POST_OP BIT(23)
static int parser_version;
diff --git a/tests/gem_exec_reloc.c b/tests/gem_exec_reloc.c
index 8356d852..bf407f2e 100644
--- a/tests/gem_exec_reloc.c
+++ b/tests/gem_exec_reloc.c
@@ -29,8 +29,8 @@ IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl
relocations.");
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
@@ -61,7 +61,7 @@ static void write_dword(int fd,
obj[1].handle = gem_create(fd, 4096);
i = 0;
- buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? 1<<22 : 0);
+ buf[i++] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
buf[i++] = target_offset;
buf[i++] = target_offset >> 32;
@@ -292,7 +292,7 @@ static void active(int fd, unsigned engine)
for (pass = 0; pass < 1024; pass++) {
uint32_t batch[16];
int i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
diff --git a/tests/gem_exec_reuse.c b/tests/gem_exec_reuse.c
index f0323c8b..bf4ae062 100644
--- a/tests/gem_exec_reuse.c
+++ b/tests/gem_exec_reuse.c
@@ -51,7 +51,7 @@ static void noop(struct noop *n,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(n->obj);
execbuf.buffer_count = count + 1;
- execbuf.flags = ring | 1 << 12;
+ execbuf.flags = ring | BIT(12);
execbuf.rsvd1 = ctx;
gem_execbuf(n->fd, &execbuf);
}
@@ -162,7 +162,7 @@ igt_main
if (max < gtt_size)
gtt_size = max;
- no.nhandles = 1 << (fls(gtt_size) - 1);
+ no.nhandles = BIT(fls(gtt_size) - 1);
intel_require_memory(no.nhandles, 4096, CHECK_RAM);
no.max_age = no.nhandles / 2;
diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index d8454d58..c92c1317 100644
--- a/tests/gem_exec_schedule.c
+++ b/tests/gem_exec_schedule.c
@@ -87,7 +87,7 @@ static void store_dword(int fd, uint32_t ctx, unsigned ring,
obj[2].relocation_count = 1;
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = offset;
batch[++i] = 0;
@@ -147,11 +147,11 @@ static uint32_t *make_busy(int fd, uint32_t target,
unsigned ring)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/gem_exec_store.c b/tests/gem_exec_store.c
index 08248966..eed32f47 100644
--- a/tests/gem_exec_store.c
+++ b/tests/gem_exec_store.c
@@ -71,7 +71,7 @@ static void store_dword(int fd, unsigned ring)
obj[1].relocation_count = 1;
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
@@ -122,7 +122,7 @@ static void store_all(int fd)
offset = sizeof(uint32_t);
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
diff --git a/tests/gem_exec_suspend.c b/tests/gem_exec_suspend.c
index c250761e..e66248a5 100644
--- a/tests/gem_exec_suspend.c
+++ b/tests/gem_exec_suspend.c
@@ -43,7 +43,7 @@
#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
#define UNCACHED (0<<8)
-#define CACHED (1<<8)
+#define CACHED BIT(8)
static void run_test(int fd, unsigned ring, unsigned flags);
@@ -146,7 +146,7 @@ static void run_test(int fd, unsigned engine, unsigned
flags)
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 2;
- execbuf.flags = 1 << 11;
+ execbuf.flags = BIT(11);
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -182,7 +182,7 @@ static void run_test(int fd, unsigned engine, unsigned
flags)
offset = reloc.presumed_offset + reloc.delta;
b = 0;
- buf[b] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ buf[b] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
buf[++b] = offset;
buf[++b] = offset >> 32;
diff --git a/tests/gem_exec_whisper.c b/tests/gem_exec_whisper.c
index 7f8f568f..b37a6a46 100644
--- a/tests/gem_exec_whisper.c
+++ b/tests/gem_exec_whisper.c
@@ -31,8 +31,8 @@
#include "igt_gt.h"
#include "igt_sysfs.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
@@ -164,11 +164,11 @@ static void init_hang(struct hang *h)
batch[i++] = 0x00c00fee;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
@@ -273,7 +273,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
}
i = 0;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = store.offset + loc;
batch[++i] = (store.offset + loc) >> 32;
diff --git a/tests/gem_fence_upload.c b/tests/gem_fence_upload.c
index 7d9acdc0..d2f140cd 100644
--- a/tests/gem_fence_upload.c
+++ b/tests/gem_fence_upload.c
@@ -142,8 +142,8 @@ static void *write_thread_performance(void *closure)
return NULL;
}
-#define READ (1<<0)
-#define WRITE (1<<1)
+#define READ BIT(0)
+#define WRITE BIT(1)
static const char *direction_string(unsigned mask)
{
switch (mask) {
diff --git a/tests/gem_fenced_exec_thrash.c b/tests/gem_fenced_exec_thrash.c
index 2966bc92..476bb47d 100644
--- a/tests/gem_fenced_exec_thrash.c
+++ b/tests/gem_fenced_exec_thrash.c
@@ -141,8 +141,8 @@ static void fill_reloc(struct drm_i915_gem_relocation_entry
*reloc, uint32_t han
reloc->write_domain = 0;
}
-#define BUSY_LOAD (1 << 0)
-#define INTERRUPTIBLE (1 << 1)
+#define BUSY_LOAD BIT(0)
+#define INTERRUPTIBLE BIT(1)
static void run_test(int fd, int num_fences, int expected_errno,
unsigned flags)
diff --git a/tests/gem_gtt_hog.c b/tests/gem_gtt_hog.c
index 2fb487d7..a48d1e33 100644
--- a/tests/gem_gtt_hog.c
+++ b/tests/gem_gtt_hog.c
@@ -74,7 +74,7 @@ static void busy(data_t *data, uint32_t handle, int size, int
loops)
*b++ = XY_COLOR_BLT_CMD_NOLEN |
((data->intel_gen >= 8) ? 5 : 4) |
COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
- *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096;
+ *b++ = 0xf0 << 16 | BIT(25) | BIT(24) | 4096;
*b++ = 0;
*b++ = size >> 12 << 16 | 1024;
reloc[i].offset = (b - buf) * sizeof(uint32_t);
@@ -103,7 +103,7 @@ static void busy(data_t *data, uint32_t handle, int size,
int loops)
execbuf.buffers_ptr = to_user_pointer(gem_exec);
execbuf.buffer_count = 2;
execbuf.batch_len = (b - buf) * sizeof(buf[0]);
- execbuf.flags = 1 << 11;
+ execbuf.flags = BIT(11);
if (HAS_BLT_RING(data->devid))
execbuf.flags |= I915_EXEC_BLT;
diff --git a/tests/gem_lut_handle.c b/tests/gem_lut_handle.c
index 10516b4f..41c28161 100644
--- a/tests/gem_lut_handle.c
+++ b/tests/gem_lut_handle.c
@@ -43,7 +43,7 @@ IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using
the handle LUT"
#define BATCH_SIZE (1024*1024)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define NORMAL 0
#define USE_LUT 0x1
diff --git a/tests/gem_persistent_relocs.c b/tests/gem_persistent_relocs.c
index 9c885307..8eb432f2 100644
--- a/tests/gem_persistent_relocs.c
+++ b/tests/gem_persistent_relocs.c
@@ -89,7 +89,7 @@ static drm_intel_bo *create_special_bo(void)
BATCH((3 << 24) | (0xf0 << 16) | small_pitch);
special_line_ofs = 4*len;
BATCH(0);
- BATCH(1 << 16 | 1);
+ BATCH(BIT(16) | 1);
special_reloc_ofs = 4*len;
BATCH(0);
if (intel_gen(devid) >= 8)
@@ -271,10 +271,10 @@ static void do_test(int fd, bool faulting_reloc)
igt_enable_prefault();
}
-#define INTERRUPT (1 << 0)
-#define FAULTING (1 << 1)
-#define THRASH (1 << 2)
-#define THRASH_INACTIVE (1 << 3)
+#define INTERRUPT BIT(0)
+#define FAULTING BIT(1)
+#define THRASH BIT(2)
+#define THRASH_INACTIVE BIT(3)
#define ALL_FLAGS (INTERRUPT | FAULTING | THRASH | THRASH_INACTIVE)
static void do_forked_test(int fd, unsigned flags)
{
diff --git a/tests/gem_pin.c b/tests/gem_pin.c
index 9ea3b1e7..643138f2 100644
--- a/tests/gem_pin.c
+++ b/tests/gem_pin.c
@@ -43,8 +43,8 @@
IGT_TEST_DESCRIPTION("Exercises pinning of small buffer objects.");
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
static void exec(int fd, uint32_t handle, uint32_t offset)
{
@@ -94,7 +94,7 @@ static int gem_linear_blt(int fd,
uint32_t *b = batch;
*b++ = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
- *b++ = 0x66 << 16 | 1 << 25 | 1 << 24 | (4*1024);
+ *b++ = 0x66 << 16 | BIT(25) | BIT(24) | (4*1024);
*b++ = 0;
*b++ = (length / (4*1024)) << 16 | 1024;
*b++ = 0;
diff --git a/tests/gem_pipe_control_store_loop.c
b/tests/gem_pipe_control_store_loop.c
index a155ad14..c064a22c 100644
--- a/tests/gem_pipe_control_store_loop.c
+++ b/tests/gem_pipe_control_store_loop.c
@@ -50,15 +50,15 @@ struct intel_batchbuffer *batch;
uint32_t devid;
#define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2)
-#define PIPE_CONTROL_WRITE_IMMEDIATE (1<<14)
+#define PIPE_CONTROL_WRITE_IMMEDIATE BIT(14)
#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14)
-#define PIPE_CONTROL_DEPTH_STALL (1<<13)
-#define PIPE_CONTROL_WC_FLUSH (1<<12)
-#define PIPE_CONTROL_IS_FLUSH (1<<11) /* MBZ on Ironlake */
-#define PIPE_CONTROL_TC_FLUSH (1<<10) /* GM45+ only */
-#define PIPE_CONTROL_STALL_AT_SCOREBOARD (1<<1)
-#define PIPE_CONTROL_CS_STALL (1<<20)
-#define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */
+#define PIPE_CONTROL_DEPTH_STALL BIT(13)
+#define PIPE_CONTROL_WC_FLUSH BIT(12)
+#define PIPE_CONTROL_IS_FLUSH BIT(11) /* MBZ on Ironlake */
+#define PIPE_CONTROL_TC_FLUSH BIT(10) /* GM45+ only */
+#define PIPE_CONTROL_STALL_AT_SCOREBOARD BIT(1)
+#define PIPE_CONTROL_CS_STALL BIT(20)
+#define PIPE_CONTROL_GLOBAL_GTT BIT(2) /* in addr dword */
/* Like the store dword test, but we create new command buffers each time */
static void
@@ -78,7 +78,7 @@ store_pipe_control_loop(bool preuse_buffer)
COLOR_BLIT_COPY_BATCH_START(0);
OUT_BATCH((3 << 24) | (0xf0 << 16) | 64);
OUT_BATCH(0);
- OUT_BATCH(1 << 16 | 1);
+ OUT_BATCH(BIT(16) | 1);
/*
* IMPORTANT: We need to preuse the buffer in a
diff --git a/tests/gem_pwrite.c b/tests/gem_pwrite.c
index 8db5454c..3b0e4067 100644
--- a/tests/gem_pwrite.c
+++ b/tests/gem_pwrite.c
@@ -42,10 +42,10 @@
#define OBJECT_SIZE 16384
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
-#define BLT_SRC_TILED (1<<15)
-#define BLT_DST_TILED (1<<11)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
+#define BLT_SRC_TILED BIT(15)
+#define BLT_DST_TILED BIT(11)
static void do_gem_write(int fd, uint32_t handle, void *buf, int len, int
loops)
{
diff --git a/tests/gem_pwrite_pread.c b/tests/gem_pwrite_pread.c
index e1543f22..d2249b62 100644
--- a/tests/gem_pwrite_pread.c
+++ b/tests/gem_pwrite_pread.c
@@ -43,10 +43,10 @@
#define OBJECT_SIZE 16384
#define COPY_BLT_CMD (2<<29|0x53<<22)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
-#define BLT_SRC_TILED (1<<15)
-#define BLT_DST_TILED (1<<11)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
+#define BLT_SRC_TILED BIT(15)
+#define BLT_DST_TILED BIT(11)
uint32_t is_64bit;
uint32_t exec_flags;
@@ -56,9 +56,9 @@ static inline void build_batch(uint32_t *batch, int len,
uint32_t *batch_len)
unsigned int i = 0;
batch[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB | (is_64bit
? 8 : 6);
- batch[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | len;
+ batch[i++] = 0xcc << 16 | BIT(25) | BIT(24) | len;
batch[i++] = 0;
- batch[i++] = 1 << 16 | (len / 4);
+ batch[i++] = BIT(16) | (len / 4);
batch[i++] = 0; /* dst */
if (is_64bit)
batch[i++] = 0;
diff --git a/tests/gem_reloc_vs_gpu.c b/tests/gem_reloc_vs_gpu.c
index ef898231..7120db7d 100644
--- a/tests/gem_reloc_vs_gpu.c
+++ b/tests/gem_reloc_vs_gpu.c
@@ -81,7 +81,7 @@ static void create_special_bo(void)
BATCH((3 << 24) | (0xf0 << 16) | small_pitch);
BATCH(0);
- BATCH(1 << 16 | 1);
+ BATCH(BIT(16) | 1);
special_reloc_ofs = 4*len;
BATCH(0);
if (intel_gen(devid) >= 8)
@@ -244,11 +244,11 @@ static void do_test(int fd, bool faulting_reloc,
igt_enable_prefault();
}
-#define INTERRUPT (1 << 0)
-#define FAULTING (1 << 1)
-#define THRASH (1 << 2)
-#define THRASH_INACTIVE (1 << 3)
-#define HANG (1 << 4)
+#define INTERRUPT BIT(0)
+#define FAULTING BIT(1)
+#define THRASH BIT(2)
+#define THRASH_INACTIVE BIT(3)
+#define HANG BIT(4)
#define ALL_FLAGS (HANG | INTERRUPT | FAULTING | THRASH | THRASH_INACTIVE)
static void do_forked_test(int fd, unsigned flags)
{
diff --git a/tests/gem_reset_stats.c b/tests/gem_reset_stats.c
index c4ce4ac2..2bceb6cb 100644
--- a/tests/gem_reset_stats.c
+++ b/tests/gem_reset_stats.c
@@ -43,9 +43,9 @@
#define RS_NO_ERROR 0
-#define RS_BATCH_ACTIVE (1 << 0)
-#define RS_BATCH_PENDING (1 << 1)
-#define RS_UNKNOWN (1 << 2)
+#define RS_BATCH_ACTIVE BIT(0)
+#define RS_BATCH_PENDING BIT(1)
+#define RS_UNKNOWN BIT(2)
static uint32_t devid;
diff --git a/tests/gem_ringfill.c b/tests/gem_ringfill.c
index 8e221cf8..d765d4da 100644
--- a/tests/gem_ringfill.c
+++ b/tests/gem_ringfill.c
@@ -99,7 +99,7 @@ static int setup_execbuf(int fd,
memset(reloc, 0, 1024*sizeof(*reloc));
execbuf->buffers_ptr = to_user_pointer(obj);
- execbuf->flags = ring | (1 << 11) | (1 << 12);
+ execbuf->flags = ring | BIT(11) | BIT(12);
if (gen > 3 && gen < 6)
execbuf->flags |= I915_EXEC_SECURE;
@@ -139,12 +139,12 @@ static int setup_execbuf(int fd,
*b++ = offset >> 32;
} else if (gen >= 4) {
if (gen < 6)
- b[-1] |= 1 << 22;
+ b[-1] |= BIT(22);
*b++ = 0;
*b++ = offset;
reloc[i].offset += sizeof(*batch);
} else {
- b[-1] |= 1 << 22;
+ b[-1] |= BIT(22);
b[-1] -= 1;
*b++ = offset;
}
diff --git a/tests/gem_shrink.c b/tests/gem_shrink.c
index bd0f17da..1877bb00 100644
--- a/tests/gem_shrink.c
+++ b/tests/gem_shrink.c
@@ -137,7 +137,7 @@ static void execbufN(int fd, uint64_t alloc)
for (int i = 1; i <= count; i++) {
int j = count - i;
- obj[j].handle = gem_create(fd, 1 << 20);
+ obj[j].handle = gem_create(fd, BIT(20));
execbuf.buffers_ptr = to_user_pointer(&obj[j]);
execbuf.buffer_count = i + 1;
gem_execbuf(fd, &execbuf);
@@ -165,7 +165,7 @@ static void hang(int fd, uint64_t alloc)
for (int i = 1; i <= count; i++) {
int j = count - i;
- obj[j].handle = gem_create(fd, 1 << 20);
+ obj[j].handle = gem_create(fd, BIT(20));
execbuf.buffers_ptr = to_user_pointer(&obj[j]);
execbuf.buffer_count = i + 1;
gem_execbuf(fd, &execbuf);
diff --git a/tests/gem_softpin.c b/tests/gem_softpin.c
index 7678acfe..55dee1ae 100644
--- a/tests/gem_softpin.c
+++ b/tests/gem_softpin.c
@@ -28,8 +28,8 @@
#include "igt.h"
-#define EXEC_OBJECT_PINNED (1<<4)
-#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
+#define EXEC_OBJECT_PINNED BIT(4)
+#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS BIT(3)
/* gen8_canonical_addr
* Used to convert any address into canonical form, i.e. [63:48] == [47].
@@ -227,8 +227,8 @@ static uint64_t busy_batch(int fd)
object[0].offset, object[1].offset);
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
gem_set_domain(fd, object[1].handle,
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
while (factor--) {
@@ -236,7 +236,7 @@ static uint64_t busy_batch(int fd)
map[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
if (has_64bit_reloc)
map[i-1] += 2;
- map[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024);
+ map[i++] = 0xcc << 16 | BIT(25) | BIT(24) | (4*1024);
map[i++] = 0;
map[i++] = 256 << 16 | 1024;
map[i++] = object[0].offset;
@@ -424,7 +424,7 @@ static void test_noreloc(int fd, enum sleep sleep)
gem_set_domain(fd, object[i].handle,
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
for (i = 0; i < ARRAY_SIZE(object) - 1; i++) {
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = object[i].offset;
*b++ = object[i].offset >> 32;
diff --git a/tests/gem_storedw_batches_loop.c b/tests/gem_storedw_batches_loop.c
index 4b0249a6..c3d38363 100644
--- a/tests/gem_storedw_batches_loop.c
+++ b/tests/gem_storedw_batches_loop.c
@@ -42,7 +42,7 @@ static drm_intel_bufmgr *bufmgr;
static drm_intel_bo *target_bo;
static int has_ppgtt = 0;
-#define SECURE_DISPATCH (1<<0)
+#define SECURE_DISPATCH BIT(0)
/* Like the store dword test, but we create new command buffers each time */
static void
diff --git a/tests/gem_streaming_writes.c b/tests/gem_streaming_writes.c
index 2b35410c..3b726228 100644
--- a/tests/gem_streaming_writes.c
+++ b/tests/gem_streaming_writes.c
@@ -43,11 +43,11 @@
#define CHUNK_SIZE 32
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
-#define BLT_WRITE_ALPHA (1<<21)
-#define BLT_WRITE_RGB (1<<20)
+#define BLT_WRITE_ALPHA BIT(21)
+#define BLT_WRITE_RGB BIT(20)
#define BLT_WRITE_ARGB (BLT_WRITE_ALPHA | BLT_WRITE_RGB)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources");
@@ -162,7 +162,7 @@ static void test_streaming(int fd, int mode, int sync)
if (has_64bit_reloc)
b[k] += 2;
k++;
- b[k++] = 0xcc << 16 | 1 << 25 | 1 << 24 | 4096;
+ b[k++] = 0xcc << 16 | BIT(25) | BIT(24) | 4096;
b[k++] = (y << 16) | x;
b[k++] = ((y+1) << 16) | (x + (CHUNK_SIZE >> 2));
b[k++] = dst_offset;
@@ -337,7 +337,7 @@ static void test_batch(int fd, int mode, int reverse)
if (has_64bit_reloc)
base[k] += 2;
k++;
- base[k++] = 0xcc << 16 | 1 << 25 | 1 << 24 | 4096;
+ base[k++] = 0xcc << 16 | BIT(25) | BIT(24) | 4096;
base[k++] = (y << 16) | x;
base[k++] = ((y+1) << 16) | (x + (CHUNK_SIZE >> 2));
base[k++] = dst_offset;
diff --git a/tests/gem_stress.c b/tests/gem_stress.c
index 4d0de5c4..74f66d18 100644
--- a/tests/gem_stress.c
+++ b/tests/gem_stress.c
@@ -187,7 +187,7 @@ static void keep_gpu_busy(void)
{
int tmp;
- tmp = 1 << gpu_busy_load;
+ tmp = BIT(gpu_busy_load);
igt_assert_lte(tmp, 1024);
emit_blt(busy_bo, 0, 4096, 0, 0, tmp, 128,
@@ -540,15 +540,15 @@ static void init_set(unsigned set)
if (buffers[set][i].tiling == I915_TILING_NONE) {
/* min 64 byte stride */
r %= 8;
- buffers[set][i].stride = 64 * (1 << r);
+ buffers[set][i].stride = 64 * BIT(r);
} else if (IS_GEN2(devid)) {
/* min 128 byte stride */
r %= 7;
- buffers[set][i].stride = 128 * (1 << r);
+ buffers[set][i].stride = 128 * BIT(r);
} else {
/* min 512 byte stride */
r %= 5;
- buffers[set][i].stride = 512 * (1 << r);
+ buffers[set][i].stride = 512 * BIT(r);
}
sanitize_stride(&buffers[set][i]);
diff --git a/tests/gem_sync.c b/tests/gem_sync.c
index 33d356ad..011da675 100644
--- a/tests/gem_sync.c
+++ b/tests/gem_sync.c
@@ -27,8 +27,8 @@
#include "igt.h"
#include "igt_sysfs.h"
-#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
-#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
+#define LOCAL_I915_EXEC_NO_RELOC BIT(11)
+#define LOCAL_I915_EXEC_HANDLE_LUT BIT(12)
#define LOCAL_I915_EXEC_BSD_SHIFT (13)
#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
@@ -241,7 +241,7 @@ store_ring(int fd, unsigned ring, int num_children, int
timeout)
reloc[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
offset = object[0].offset + reloc[i].delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
@@ -367,7 +367,7 @@ __store_many(int fd, unsigned ring, int timeout, unsigned
long *cycles)
reloc[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
offset = object[0].offset + reloc[i].delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
@@ -646,7 +646,7 @@ store_all(int fd, int num_children, int timeout)
reloc[i].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
offset = object[0].offset + reloc[i].delta;
- *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ *b++ = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
*b++ = offset;
*b++ = offset >> 32;
diff --git a/tests/gem_tiled_pread_basic.c b/tests/gem_tiled_pread_basic.c
index 425bb07e..894dfcb6 100644
--- a/tests/gem_tiled_pread_basic.c
+++ b/tests/gem_tiled_pread_basic.c
@@ -84,7 +84,7 @@ create_bo(int fd)
static int
swizzle_bit(int bit, int offset)
{
- return (offset & (1 << bit)) >> (bit - 6);
+ return (offset & BIT(bit)) >> (bit - 6);
}
struct offset {
diff --git a/tests/gem_tiled_wb.c b/tests/gem_tiled_wb.c
index 67d54bd3..5eb3348d 100644
--- a/tests/gem_tiled_wb.c
+++ b/tests/gem_tiled_wb.c
@@ -83,7 +83,7 @@ create_bo(int fd)
static int
swizzle_bit(int bit, int offset)
{
- return (offset & (1 << bit)) >> (bit - 6);
+ return (offset & BIT(bit)) >> (bit - 6);
}
/* Translate from a swizzled offset in the tiled buffer to the corresponding
diff --git a/tests/gem_tiled_wc.c b/tests/gem_tiled_wc.c
index 65ac3851..98ba2bf6 100644
--- a/tests/gem_tiled_wc.c
+++ b/tests/gem_tiled_wc.c
@@ -76,7 +76,7 @@ create_bo(int fd)
static int
swizzle_bit(int bit, int offset)
{
- return (offset & (1 << bit)) >> (bit - 6);
+ return (offset & BIT(bit)) >> (bit - 6);
}
/* Translate from a swizzled offset in the tiled buffer to the corresponding
diff --git a/tests/gem_write_read_ring_switch.c
b/tests/gem_write_read_ring_switch.c
index d00d4f95..8fbfe563 100644
--- a/tests/gem_write_read_ring_switch.c
+++ b/tests/gem_write_read_ring_switch.c
@@ -96,7 +96,7 @@ static void run_test(int ring)
(0xff << 16) |
128);
OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((1 << 16) | 1);
+ OUT_BATCH(BIT(16) | 1);
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(COLOR);
ADVANCE_BATCH();
@@ -125,7 +125,7 @@ static void run_test(int ring)
OUT_BATCH(MI_FLUSH_DW | 1);
OUT_BATCH(0); /* reserved */
OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- OUT_BATCH(MI_NOOP | (1<<22) | (0xf));
+ OUT_BATCH(MI_NOOP | BIT(22) | (0xf));
ADVANCE_BATCH();
}
intel_batchbuffer_flush_on_ring(batch, ring);
diff --git a/tests/gen3_mixed_blits.c b/tests/gen3_mixed_blits.c
index 1159b4eb..2833e28e 100644
--- a/tests/gen3_mixed_blits.c
+++ b/tests/gen3_mixed_blits.c
@@ -132,7 +132,7 @@ render_copy(int fd,
ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
*b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) |
I1_LOAD_S(5) | 2);
*b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
- *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
+ *b++ = (BIT(S4_POINT_WIDTH_SHIFT) |
S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE |
S4_VFMT_XY);
@@ -161,7 +161,7 @@ render_copy(int fd,
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
*b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling_bits |
(HEIGHT - 1) << MS3_HEIGHT_SHIFT |
@@ -169,7 +169,7 @@ render_copy(int fd,
*b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
*b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
diff --git a/tests/gen3_render_linear_blits.c b/tests/gen3_render_linear_blits.c
index e56bff93..c0015e3a 100644
--- a/tests/gen3_render_linear_blits.c
+++ b/tests/gen3_render_linear_blits.c
@@ -125,7 +125,7 @@ copy(int fd, uint32_t dst, uint32_t src)
ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
*b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) |
I1_LOAD_S(5) | 2);
*b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
- *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
+ *b++ = (BIT(S4_POINT_WIDTH_SHIFT) |
S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE |
S4_VFMT_XY);
@@ -144,7 +144,7 @@ copy(int fd, uint32_t dst, uint32_t src)
/* samler state */
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
*b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 |
(HEIGHT - 1) << MS3_HEIGHT_SHIFT |
@@ -152,7 +152,7 @@ copy(int fd, uint32_t dst, uint32_t src)
*b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
*b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
diff --git a/tests/gen3_render_mixed_blits.c b/tests/gen3_render_mixed_blits.c
index 6cc8d056..74e99aa6 100644
--- a/tests/gen3_render_mixed_blits.c
+++ b/tests/gen3_render_mixed_blits.c
@@ -127,7 +127,7 @@ copy(int fd,
ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
*b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) |
I1_LOAD_S(5) | 2);
*b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
- *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
+ *b++ = (BIT(S4_POINT_WIDTH_SHIFT) |
S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE |
S4_VFMT_XY);
@@ -152,7 +152,7 @@ copy(int fd,
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
*b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 | tiling_bits |
(HEIGHT - 1) << MS3_HEIGHT_SHIFT |
@@ -160,7 +160,7 @@ copy(int fd,
*b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
*b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
diff --git a/tests/gen3_render_tiledx_blits.c b/tests/gen3_render_tiledx_blits.c
index 6706d3a3..40517e21 100644
--- a/tests/gen3_render_tiledx_blits.c
+++ b/tests/gen3_render_tiledx_blits.c
@@ -124,7 +124,7 @@ copy(int fd, uint32_t dst, uint32_t src)
ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
*b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) |
I1_LOAD_S(5) | 2);
*b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
- *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
+ *b++ = (BIT(S4_POINT_WIDTH_SHIFT) |
S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE |
S4_VFMT_XY);
@@ -143,7 +143,7 @@ copy(int fd, uint32_t dst, uint32_t src)
/* samler state */
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
*b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 |
MS3_TILED_SURFACE |
@@ -152,7 +152,7 @@ copy(int fd, uint32_t dst, uint32_t src)
*b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
*b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
diff --git a/tests/gen3_render_tiledy_blits.c b/tests/gen3_render_tiledy_blits.c
index 44e88d4d..255f03b7 100644
--- a/tests/gen3_render_tiledy_blits.c
+++ b/tests/gen3_render_tiledy_blits.c
@@ -124,7 +124,7 @@ copy(int fd, uint32_t dst, uint32_t src)
ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
*b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) |
I1_LOAD_S(5) | 2);
*b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
- *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
+ *b++ = (BIT(S4_POINT_WIDTH_SHIFT) |
S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE |
S4_VFMT_XY);
@@ -143,7 +143,7 @@ copy(int fd, uint32_t dst, uint32_t src)
/* samler state */
#define TEX_COUNT 1
*b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
*b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 |
MS3_TILED_SURFACE | MS3_TILE_WALK |
@@ -152,7 +152,7 @@ copy(int fd, uint32_t dst, uint32_t src)
*b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
*b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
- *b++ = ((1 << TEX_COUNT) - 1);
+ *b++ = (BIT(TEX_COUNT) - 1);
*b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
diff --git a/tests/gen7_forcewake_mt.c b/tests/gen7_forcewake_mt.c
index 07320ef9..aeaec44f 100644
--- a/tests/gen7_forcewake_mt.c
+++ b/tests/gen7_forcewake_mt.c
@@ -107,7 +107,7 @@ static void *thread(void *arg)
{
struct thread *t = arg;
uint32_t *forcewake_mt = (uint32_t *)((char *)t->mmio + FORCEWAKE_MT);
- uint32_t bit = 1 << t->bit;
+ uint32_t bit = BIT(t->bit);
while (1) {
*forcewake_mt = bit << 16 | bit;
diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
index d6273f4f..f1f35c7e 100644
--- a/tests/kms_atomic.c
+++ b/tests/kms_atomic.c
@@ -79,8 +79,8 @@ IGT_TEST_DESCRIPTION("Test atomic modesetting API");
enum kms_atomic_check_relax {
ATOMIC_RELAX_NONE = 0,
- CRTC_RELAX_MODE = (1 << 0),
- PLANE_RELAX_FB = (1 << 1)
+ CRTC_RELAX_MODE = BIT(0),
+ PLANE_RELAX_FB = BIT(1)
};
/**
@@ -420,7 +420,7 @@ find_plane(struct kms_atomic_state *state, enum plane_type
type,
continue;
if (type != NUM_PLANE_TYPE_PROPS && plane->type != type)
continue;
- if (crtc && !(plane->crtc_mask & (1 << crtc->idx)))
+ if (crtc && !(plane->crtc_mask & BIT(crtc->idx)))
continue;
plane_get_current_state(plane);
diff --git a/tests/kms_atomic_transition.c b/tests/kms_atomic_transition.c
index 797134c0..6b262a28 100644
--- a/tests/kms_atomic_transition.c
+++ b/tests/kms_atomic_transition.c
@@ -59,7 +59,7 @@ wm_setup_plane(igt_display_t *display, enum pipe pipe,
for_each_plane_on_pipe(display, pipe, plane) {
int i = plane->index;
- if (!((1 << plane->index) & mask)) {
+ if (!(BIT(plane->index) & mask)) {
igt_plane_set_fb(plane, NULL);
continue;
}
@@ -197,7 +197,7 @@ retry:
set_sprite_wh(display, pipe, parms, sprite_fb,
alpha, sprite_width, sprite_height);
- wm_setup_plane(display, pipe, (1 << n_planes) - 1, parms);
+ wm_setup_plane(display, pipe, BIT(n_planes) - 1, parms);
ret = igt_display_try_commit_atomic(display,
DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
if (ret == -EINVAL) {
@@ -359,7 +359,7 @@ run_transition_test(igt_display_t *display, enum pipe pipe,
igt_output_t *output
struct igt_fb fb, argb_fb, sprite_fb;
drmModeModeInfo *mode, override_mode;
igt_plane_t *plane;
- uint32_t iter_max = 1 << display->pipes[pipe].n_planes, i;
+ uint32_t iter_max = BIT(display->pipes[pipe].n_planes), i;
struct plane_parms parms[display->pipes[pipe].n_planes];
bool skip_test = false;
unsigned flags = DRM_MODE_PAGE_FLIP_EVENT;
@@ -545,16 +545,16 @@ static unsigned set_combinations(igt_display_t *display,
unsigned mask, struct i
DRM_PLANE_TYPE_PRIMARY);
drmModeModeInfo *mode = NULL;
- if (!(mask & (1 << pipe))) {
+ if (!(mask & BIT(pipe))) {
if (display->pipes[pipe].mode_blob) {
- event_mask |= 1 << pipe;
+ event_mask |= BIT(pipe);
igt_plane_set_fb(plane, NULL);
}
continue;
}
- event_mask |= 1 << pipe;
+ event_mask |= BIT(pipe);
for_each_valid_output_on_pipe(display, pipe, output) {
if (output->pending_crtc_idx_mask)
@@ -592,7 +592,7 @@ static void collect_crcs_mask(igt_pipe_crc_t **pipe_crcs,
unsigned mask, igt_crc
int i;
for (i = 0; i < I915_MAX_PIPES; i++) {
- if (!((1 << i) & mask))
+ if (!(BIT(i) & mask))
continue;
if (!pipe_crcs[i])
@@ -606,7 +606,7 @@ static void run_modeset_tests(igt_display_t *display, int
howmany, bool nonblock
{
struct igt_fb fbs[2];
int i, j;
- unsigned iter_max = 1 << display->n_pipes;
+ unsigned iter_max = BIT(display->n_pipes);
igt_pipe_crc_t *pipe_crcs[I915_MAX_PIPES];
igt_output_t *output;
unsigned width = 0, height = 0;
@@ -712,12 +712,12 @@ static void run_modeset_tests(igt_display_t *display, int
howmany, bool nonblock
continue;
for (int k = 0; k < I915_MAX_PIPES; k++) {
- if (i & (1 << k)) {
+ if (i & BIT(k)) {
igt_assert_crc_equal(&crcs[0][k],
&crcs[3][k]);
igt_assert_crc_equal(&crcs[0][k],
&crcs[4][k]);
}
- if (j & (1 << k))
+ if (j & BIT(k))
igt_assert_crc_equal(&crcs[1][k],
&crcs[2][k]);
}
}
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 11acda89..415a0e45 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -29,10 +29,10 @@ IGT_TEST_DESCRIPTION("Test render compression (RC), in
which the main surface "
"the display uses to interpret the compressed data.");
enum test_flags {
- TEST_CRC = 1 << 1,
- TEST_ROTATE_180 = 1 << 2,
- TEST_BAD_PIXEL_FORMAT = 1 << 3,
- TEST_BAD_ROTATION_90 = 1 << 4,
+ TEST_CRC = BIT(1),
+ TEST_ROTATE_180 = BIT(2),
+ TEST_BAD_PIXEL_FORMAT = BIT(3),
+ TEST_BAD_ROTATION_90 = BIT(4),
};
typedef struct {
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 4851e18f..009883da 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -63,8 +63,8 @@ typedef struct {
unsigned flags;
} data_t;
-#define TEST_DPMS (1<<0)
-#define TEST_SUSPEND (1<<1)
+#define TEST_DPMS BIT(0)
+#define TEST_SUSPEND BIT(1)
static void draw_cursor(cairo_t *cr, int x, int y, int cw, int ch)
{
diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
index c7083a07..310a57f1 100644
--- a/tests/kms_cursor_legacy.c
+++ b/tests/kms_cursor_legacy.c
@@ -533,11 +533,11 @@ static uint32_t *make_busy(int fd, uint32_t target)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/kms_fbc_crc.c b/tests/kms_fbc_crc.c
index 96af06a0..221d4658 100644
--- a/tests/kms_fbc_crc.c
+++ b/tests/kms_fbc_crc.c
@@ -108,7 +108,7 @@ static void fill_blt(data_t *data,
COLOR_BLIT_COPY_BATCH_START(flags);
OUT_BATCH(3 << 24 | 0xf0 << 16 | pitch);
OUT_BATCH(0);
- OUT_BATCH(1 << 16 | 1);
+ OUT_BATCH(BIT(16) | 1);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
OUT_BATCH(pixel);
ADVANCE_BATCH();
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 41406dfe..5439323c 100644
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -46,40 +46,40 @@
#include "igt_stats.h"
-#define TEST_DPMS (1 << 0)
-#define TEST_WITH_DUMMY_BCS (1 << 1)
-#define TEST_WITH_DUMMY_RCS (1 << 2)
-#define TEST_PAN (1 << 3)
-#define TEST_MODESET (1 << 4)
-#define TEST_CHECK_TS (1 << 5)
-#define TEST_EBUSY (1 << 6)
-#define TEST_EINVAL (1 << 7)
-#define TEST_FLIP (1 << 8)
-#define TEST_VBLANK (1 << 9)
-#define TEST_VBLANK_BLOCK (1 << 10)
-#define TEST_VBLANK_ABSOLUTE (1 << 11)
-#define TEST_VBLANK_EXPIRED_SEQ (1 << 12)
-#define TEST_FB_RECREATE (1 << 13)
-#define TEST_RMFB (1 << 14)
-#define TEST_HANG (1 << 15)
-#define TEST_NOEVENT (1 << 16)
-#define TEST_FB_BAD_TILING (1 << 17)
-#define TEST_SINGLE_BUFFER (1 << 18)
-#define TEST_DPMS_OFF (1 << 19)
-#define TEST_NO_2X_OUTPUT (1 << 20)
-#define TEST_DPMS_OFF_OTHERS (1 << 21)
-#define TEST_ENOENT (1 << 22)
-#define TEST_FENCE_STRESS (1 << 23)
-#define TEST_VBLANK_RACE (1 << 24)
-#define TEST_RPM (1 << 25)
-#define TEST_SUSPEND (1 << 26)
-#define TEST_TS_CONT (1 << 27)
-#define TEST_BO_TOOBIG (1 << 28)
-#define TEST_HANG_ONCE (1 << 29)
-#define TEST_BASIC (1 << 30)
-
-#define EVENT_FLIP (1 << 0)
-#define EVENT_VBLANK (1 << 1)
+#define TEST_DPMS BIT(0)
+#define TEST_WITH_DUMMY_BCS BIT(1)
+#define TEST_WITH_DUMMY_RCS BIT(2)
+#define TEST_PAN BIT(3)
+#define TEST_MODESET BIT(4)
+#define TEST_CHECK_TS BIT(5)
+#define TEST_EBUSY BIT(6)
+#define TEST_EINVAL BIT(7)
+#define TEST_FLIP BIT(8)
+#define TEST_VBLANK BIT(9)
+#define TEST_VBLANK_BLOCK BIT(10)
+#define TEST_VBLANK_ABSOLUTE BIT(11)
+#define TEST_VBLANK_EXPIRED_SEQ BIT(12)
+#define TEST_FB_RECREATE BIT(13)
+#define TEST_RMFB BIT(14)
+#define TEST_HANG BIT(15)
+#define TEST_NOEVENT BIT(16)
+#define TEST_FB_BAD_TILING BIT(17)
+#define TEST_SINGLE_BUFFER BIT(18)
+#define TEST_DPMS_OFF BIT(19)
+#define TEST_NO_2X_OUTPUT BIT(20)
+#define TEST_DPMS_OFF_OTHERS BIT(21)
+#define TEST_ENOENT BIT(22)
+#define TEST_FENCE_STRESS BIT(23)
+#define TEST_VBLANK_RACE BIT(24)
+#define TEST_RPM BIT(25)
+#define TEST_SUSPEND BIT(26)
+#define TEST_TS_CONT BIT(27)
+#define TEST_BO_TOOBIG BIT(28)
+#define TEST_HANG_ONCE BIT(29)
+#define TEST_BASIC BIT(30)
+
+#define EVENT_FLIP BIT(0)
+#define EVENT_VBLANK BIT(1)
#ifndef DRM_CAP_TIMESTAMP_MONOTONIC
#define DRM_CAP_TIMESTAMP_MONOTONIC 6
@@ -900,7 +900,7 @@ static void connector_find_preferred_mode(uint32_t
connector_id, int crtc_idx,
{
struct kmstest_connector_config config;
- if (!kmstest_get_connector_config(drm_fd, connector_id, 1 << crtc_idx,
+ if (!kmstest_get_connector_config(drm_fd, connector_id, BIT(crtc_idx),
&config)) {
o->mode_valid = 0;
return;
@@ -945,11 +945,11 @@ static void connector_find_compatible_mode(int crtc_idx0,
int crtc_idx1,
int n, m;
if (!kmstest_get_connector_config(drm_fd, o->_connector[0],
- 1 << crtc_idx0, &config[0]))
+ BIT(crtc_idx0), &config[0]))
return;
if (!kmstest_get_connector_config(drm_fd, o->_connector[1],
- 1 << crtc_idx1, &config[1])) {
+ BIT(crtc_idx1), &config[1])) {
kmstest_free_connector_config(&config[0]);
return;
}
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 4f4848bc..e9a8c7f6 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -389,7 +389,7 @@ static void init_mode_params(struct modeset_params *params,
uint32_t crtc_id,
int i;
for (i = 0; i < drm.plane_res->count_planes; i++)
- if ((drm.planes[i]->possible_crtcs & (1 << crtc_idx)) &&
+ if ((drm.planes[i]->possible_crtcs & BIT(crtc_idx)) &&
drm.plane_types[i] == DRM_PLANE_TYPE_OVERLAY) {
overlay_plane_id = drm.planes[i]->plane_id;
break;
@@ -524,7 +524,7 @@ static bool init_modeset_cached_params(void)
igt_require(drm.res->count_crtcs >= 2);
scnd_crtc_id = kmstest_find_crtc_for_connector(drm.fd, drm.res,
scnd_connector,
- 1 << kmstest_get_crtc_idx(drm.res, prim_crtc_id));
+ BIT(kmstest_get_crtc_idx(drm.res, prim_crtc_id)));
init_mode_params(&scnd_mode_params, scnd_crtc_id,
scnd_connector, scnd_mode);
print_mode_info("Secondary", &scnd_mode_params);
@@ -1628,18 +1628,18 @@ static void do_flush(const struct test_mode *t)
gem_set_domain(drm.fd, target->fb->gem_handle, I915_GEM_DOMAIN_GTT, 0);
}
-#define DONT_ASSERT_CRC (1 << 0)
-#define DONT_ASSERT_FEATURE_STATUS (1 << 1)
+#define DONT_ASSERT_CRC BIT(0)
+#define DONT_ASSERT_FEATURE_STATUS BIT(1)
#define FBC_ASSERT_FLAGS (0xF << 2)
-#define ASSERT_FBC_ENABLED (1 << 2)
-#define ASSERT_FBC_DISABLED (1 << 3)
-#define ASSERT_LAST_ACTION_CHANGED (1 << 4)
-#define ASSERT_NO_ACTION_CHANGE (1 << 5)
+#define ASSERT_FBC_ENABLED BIT(2)
+#define ASSERT_FBC_DISABLED BIT(3)
+#define ASSERT_LAST_ACTION_CHANGED BIT(4)
+#define ASSERT_NO_ACTION_CHANGE BIT(5)
#define PSR_ASSERT_FLAGS (3 << 6)
-#define ASSERT_PSR_ENABLED (1 << 6)
-#define ASSERT_PSR_DISABLED (1 << 7)
+#define ASSERT_PSR_ENABLED BIT(6)
+#define ASSERT_PSR_DISABLED BIT(7)
static int adjust_assertion_flags(const struct test_mode *t, int flags)
{
@@ -2296,7 +2296,7 @@ static void set_prim_plane_for_params(struct
modeset_params *params)
uint32_t plane_id = 0;
for (i = 0; i < drm.plane_res->count_planes; i++)
- if ((drm.planes[i]->possible_crtcs & (1 << crtc_idx)) &&
+ if ((drm.planes[i]->possible_crtcs & BIT(crtc_idx)) &&
drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY)
plane_id = drm.planes[i]->plane_id;
igt_assert(plane_id);
@@ -2591,7 +2591,7 @@ static bool prim_plane_disabled(void)
int crtc_idx = kmstest_get_crtc_idx(drm.res, prim_mode_params.crtc_id);
for (i = 0; i < drm.plane_res->count_planes; i++) {
- if ((drm.planes[i]->possible_crtcs & (1 << crtc_idx)) &&
+ if ((drm.planes[i]->possible_crtcs & BIT(crtc_idx)) &&
drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY) {
found = true;
disabled = (drm.planes[i]->crtc_id == 0);
@@ -2730,7 +2730,7 @@ static void scaledprimary_subtest(const struct test_mode
*t)
pick_color(&new_fb, COLOR_MAGENTA));
for (i = 0; i < drm.plane_res->count_planes; i++)
- if ((drm.planes[i]->possible_crtcs & (1 << prim_crtc_idx)) &&
+ if ((drm.planes[i]->possible_crtcs & BIT(prim_crtc_idx)) &&
drm.plane_types[i] == DRM_PLANE_TYPE_PRIMARY)
plane_id = drm.planes[i]->plane_id;
diff --git a/tests/kms_pipe_color.c b/tests/kms_pipe_color.c
index c7a5d2f1..e9c47317 100644
--- a/tests/kms_pipe_color.c
+++ b/tests/kms_pipe_color.c
@@ -148,8 +148,8 @@ static struct _drm_color_lut *coeffs_to_lut(data_t *data,
{
struct _drm_color_lut *lut;
uint32_t i;
- uint32_t max_value = (1 << 16) - 1;
- uint32_t mask = ((1 << color_depth) - 1) << 8;
+ uint32_t max_value = BIT(16) - 1;
+ uint32_t mask = (BIT(color_depth) - 1) << 8;
lut = malloc(sizeof(struct _drm_color_lut) * lut_size);
@@ -218,7 +218,7 @@ static void set_ctm(igt_pipe_t *pipe, const double
*coefficients)
if (coefficients[i] < 0) {
ctm.matrix[i] =
(int64_t) (-coefficients[i] * ((int64_t) 1L <<
32));
- ctm.matrix[i] |= 1ULL << 63;
+ ctm.matrix[i] |= BIT_ULL(63);
} else
ctm.matrix[i] =
(int64_t) (coefficients[i] * ((int64_t) 1L <<
32));
diff --git a/tests/kms_pipe_crc_basic.c b/tests/kms_pipe_crc_basic.c
index dd2ad3c3..23fdf2f1 100644
--- a/tests/kms_pipe_crc_basic.c
+++ b/tests/kms_pipe_crc_basic.c
@@ -86,8 +86,8 @@ static void test_bad_source(data_t *data)
#define N_CRCS 3
-#define TEST_SEQUENCE (1<<0)
-#define TEST_NONBLOCK (1<<1)
+#define TEST_SEQUENCE BIT(0)
+#define TEST_NONBLOCK BIT(1)
static void
test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output,
diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index d0de0f52..e7ea5ce5 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -143,8 +143,8 @@ create_fb_for_mode__position(data_t *data, drmModeModeInfo
*mode,
}
enum {
- TEST_POSITION_FULLY_COVERED = 1 << 0,
- TEST_DPMS = 1 << 1,
+ TEST_POSITION_FULLY_COVERED = BIT(0),
+ TEST_DPMS = BIT(1),
};
static void
@@ -286,9 +286,9 @@ create_fb_for_mode__panning(data_t *data, drmModeModeInfo
*mode,
}
enum {
- TEST_PANNING_TOP_LEFT = 1 << 0,
- TEST_PANNING_BOTTOM_RIGHT = 1 << 1,
- TEST_SUSPEND_RESUME = 1 << 2,
+ TEST_PANNING_TOP_LEFT = BIT(0),
+ TEST_PANNING_BOTTOM_RIGHT = BIT(1),
+ TEST_SUSPEND_RESUME = BIT(2),
};
static void
diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
index 8f6bdc0d..55c0d23e 100644
--- a/tests/kms_psr_sink_crc.c
+++ b/tests/kms_psr_sink_crc.c
@@ -136,7 +136,7 @@ static void fill_blt(data_t *data, uint32_t handle,
unsigned char color)
igt_assert(batch);
COLOR_BLIT_COPY_BATCH_START(0);
- OUT_BATCH((1 << 24) | (0xf0 << 16) | 0);
+ OUT_BATCH(BIT(24) | (0xf0 << 16) | 0);
OUT_BATCH(0);
OUT_BATCH(0xfff << 16 | 0xfff);
OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
diff --git a/tests/kms_render.c b/tests/kms_render.c
index 72da87f1..55bebeef 100644
--- a/tests/kms_render.c
+++ b/tests/kms_render.c
@@ -211,7 +211,7 @@ static int run_test(const char *test_name, enum test_flags
flags)
struct kmstest_connector_config cconf;
if (!kmstest_get_connector_config(drm_fd, connector_id,
- 1 << j, &cconf))
+ BIT(j), &cconf))
continue;
test_connector(test_name, &cconf, flags);
diff --git a/tests/kms_setmode.c b/tests/kms_setmode.c
index 430568a1..1c92e2cf 100644
--- a/tests/kms_setmode.c
+++ b/tests/kms_setmode.c
@@ -321,10 +321,9 @@ static void setup_crtcs(drmModeRes *resources, struct
connector_config *cconf,
igt_assert(encoder);
config_valid &= !!(encoder->possible_crtcs &
- (1 << crtc->crtc_idx));
+ BIT(crtc->crtc_idx));
- encoder_mask |= 1 << get_encoder_idx(resources,
- encoder);
+ encoder_mask |= BIT(get_encoder_idx(resources,
encoder));
config_valid &= !(encoder_mask &
~encoder->possible_clones);
@@ -622,14 +621,14 @@ static int assign_crtc_to_connectors(const struct
test_config *tconf,
int crtc_idx = crtc_idxs[i];
if ((tconf->flags & TEST_SINGLE_CRTC_CLONE) &&
- crtc_idx_mask & ~(1 << crtc_idx))
+ crtc_idx_mask & ~BIT(crtc_idx))
return -1;
if ((tconf->flags & TEST_EXCLUSIVE_CRTC_CLONE) &&
- crtc_idx_mask & (1 << crtc_idx))
+ crtc_idx_mask & BIT(crtc_idx))
return -1;
- crtc_idx_mask |= 1 << crtc_idx;
+ crtc_idx_mask |= BIT(crtc_idx);
cconfs[i].crtc_idx = crtc_idx;
}
diff --git a/tests/perf.c b/tests/perf.c
index c9c5c57e..23944973 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -45,31 +45,31 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming
interface");
#define GEN6_MI_REPORT_PERF_COUNT ((0x28 << 23) | (3 - 2))
#define GFX_OP_PIPE_CONTROL ((3 << 29) | (3 << 27) | (2 << 24))
-#define PIPE_CONTROL_CS_STALL (1 << 20)
-#define PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET (1 << 19)
-#define PIPE_CONTROL_TLB_INVALIDATE (1 << 18)
-#define PIPE_CONTROL_SYNC_GFDT (1 << 17)
-#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1 << 16)
+#define PIPE_CONTROL_CS_STALL BIT(20)
+#define PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET BIT(19)
+#define PIPE_CONTROL_TLB_INVALIDATE BIT(18)
+#define PIPE_CONTROL_SYNC_GFDT BIT(17)
+#define PIPE_CONTROL_MEDIA_STATE_CLEAR BIT(16)
#define PIPE_CONTROL_NO_WRITE (0 << 14)
-#define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14)
+#define PIPE_CONTROL_WRITE_IMMEDIATE BIT(14)
#define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14)
#define PIPE_CONTROL_WRITE_TIMESTAMP (3 << 14)
-#define PIPE_CONTROL_DEPTH_STALL (1 << 13)
-#define PIPE_CONTROL_RENDER_TARGET_FLUSH (1 << 12)
-#define PIPE_CONTROL_INSTRUCTION_INVALIDATE (1 << 11)
-#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (1 << 10) /* GM45+ only */
-#define PIPE_CONTROL_ISP_DIS (1 << 9)
-#define PIPE_CONTROL_INTERRUPT_ENABLE (1 << 8)
-#define PIPE_CONTROL_FLUSH_ENABLE (1 << 7) /* Gen7+ only */
+#define PIPE_CONTROL_DEPTH_STALL BIT(13)
+#define PIPE_CONTROL_RENDER_TARGET_FLUSH BIT(12)
+#define PIPE_CONTROL_INSTRUCTION_INVALIDATE BIT(11)
+#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE BIT(10) /* GM45+ only */
+#define PIPE_CONTROL_ISP_DIS BIT(9)
+#define PIPE_CONTROL_INTERRUPT_ENABLE BIT(8)
+#define PIPE_CONTROL_FLUSH_ENABLE BIT(7) /* Gen7+ only */
/* GT */
-#define PIPE_CONTROL_DATA_CACHE_INVALIDATE (1 << 5)
-#define PIPE_CONTROL_VF_CACHE_INVALIDATE (1 << 4)
-#define PIPE_CONTROL_CONST_CACHE_INVALIDATE (1 << 3)
-#define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1 << 2)
-#define PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1)
-#define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
+#define PIPE_CONTROL_DATA_CACHE_INVALIDATE BIT(5)
+#define PIPE_CONTROL_VF_CACHE_INVALIDATE BIT(4)
+#define PIPE_CONTROL_CONST_CACHE_INVALIDATE BIT(3)
+#define PIPE_CONTROL_STATE_CACHE_INVALIDATE BIT(2)
+#define PIPE_CONTROL_STALL_AT_SCOREBOARD BIT(1)
+#define PIPE_CONTROL_DEPTH_CACHE_FLUSH BIT(0)
#define PIPE_CONTROL_PPGTT_WRITE (0 << 2)
-#define PIPE_CONTROL_GLOBAL_GTT_WRITE (1 << 2)
+#define PIPE_CONTROL_GLOBAL_GTT_WRITE BIT(2)
/* Temporarily copy i915-perf uapi here to avoid a dependency on libdrm's
* i915_drm.h copy being updated with the i915-perf interface before this
@@ -105,9 +105,9 @@ enum drm_i915_perf_property_id {
struct drm_i915_perf_open_param {
__u32 flags;
-#define I915_PERF_FLAG_FD_CLOEXEC (1<<0)
-#define I915_PERF_FLAG_FD_NONBLOCK (1<<1)
-#define I915_PERF_FLAG_DISABLED (1<<2)
+#define I915_PERF_FLAG_FD_CLOEXEC BIT(0)
+#define I915_PERF_FLAG_FD_NONBLOCK BIT(1)
+#define I915_PERF_FLAG_DISABLED BIT(2)
__u32 num_properties;
__u64 properties_ptr;
@@ -599,7 +599,7 @@ read_2_oa_reports(int stream_fd,
size_t sample_size = (sizeof(struct drm_i915_perf_record_header) +
format_size);
const struct drm_i915_perf_record_header *header;
- uint32_t exponent_mask = (1 << (exponent + 1)) - 1;
+ uint32_t exponent_mask = BIT((exponent + 1)) - 1;
/* Note: we allocate a large buffer so that each read() iteration
* should scrape *all* pending records.
@@ -688,14 +688,14 @@ read_2_oa_reports(int stream_fd,
* checking if the least significant bits are
* zero and the exponent bit is set.
*/
- if ((report[1] & exponent_mask) != (1 <<
exponent)) {
+ if ((report[1] & exponent_mask) !=
BIT(exponent)) {
igt_debug("skipping non timer report
reason=%x\n",
report[0]);
/* Also assert our hypothesis about the
* reason bit...
*/
- igt_assert_eq(report[0] & (1 << 10), 0);
+ igt_assert_eq(report[0] & BIT(10), 0);
continue;
}
}
diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index d0600d59..c6bbc784 100644
--- a/tests/pm_rpm.c
+++ b/tests/pm_rpm.c
@@ -1680,7 +1680,7 @@ static void planes_subtest(bool universal, bool dpms)
plane = drmModeGetPlane(drm_fd, planes->planes[i]);
igt_assert(plane);
- if (plane->possible_crtcs & (1 << crtc_idx)) {
+ if (plane->possible_crtcs & BIT(crtc_idx)) {
enum plane_type type;
type = universal ? get_plane_type(plane->plane_id) :
@@ -1722,7 +1722,7 @@ static void pm_test_tiling(void)
uint32_t stride = 512;
/* calculate how many objects we can map */
- for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
+ for (i = BIT(off_bit); i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
;
gem_bufs = calloc(max_gem_objs, sizeof(*gem_bufs));
@@ -1731,7 +1731,7 @@ static void pm_test_tiling(void)
/* try to set different tiling for each handle */
for (i = 0; i < ARRAY_SIZE(tiling_modes); i++) {
- for (j = 0, k = 1 << off_bit;
+ for (j = 0, k = BIT(off_bit);
k <= gtt_obj_max_size; k <<= 1, j++) {
handles[j] = gem_create(drm_fd, k);
gem_bufs[j] = gem_mmap__gtt(drm_fd, handles[j],
@@ -1750,7 +1750,7 @@ static void pm_test_tiling(void)
enable_one_screen_and_wait(&ms_data);
- for (j = 0, k = 1 << off_bit;
+ for (j = 0, k = BIT(off_bit);
k <= gtt_obj_max_size; k <<= 1, j++) {
igt_assert(munmap(gem_bufs[j], k) == 0);
gem_close(drm_fd, handles[j]);
diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index 5a54d9d4..484f3419 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -594,11 +594,11 @@ static uint32_t *make_busy(int fd, uint32_t handle)
i = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/pm_sseu.c b/tests/pm_sseu.c
index 3e60a5f8..d34e074d 100644
--- a/tests/pm_sseu.c
+++ b/tests/pm_sseu.c
@@ -223,7 +223,7 @@ gem_get_target_spins(double dt)
/* Double increments until we bound the target time */
prev_dt = 0.0;
for (i = 0; i < 32; i++) {
- spins = 1 << i;
+ spins = BIT(i);
clock_gettime(CLOCK_MONOTONIC, &tstart);
gem.spinfunc(gem.batch, &gem.buf, spins);
@@ -242,7 +242,7 @@ gem_get_target_spins(double dt)
igt_assert_neq(i, 32);
/* Linearly interpolate between i and i-1 to get target increments */
- spins = 1 << (i-1); /* lower bound spins */
+ spins = BIT((i - 1)); /* lower bound spins */
spins += spins * (dt - prev_dt)/(cur_dt - prev_dt); /* target spins */
return spins;
diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index c7ff8720..7ed9211e 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -85,7 +85,7 @@ static void busy(int fd, unsigned ring, unsigned flags)
store[count].delta = sizeof(uint32_t) * count;
store[count].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
store[count].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
@@ -110,11 +110,11 @@ static void busy(int fd, unsigned ring, unsigned flags)
store[count].write_domain = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
diff --git a/tests/prime_nv_pcopy.c b/tests/prime_nv_pcopy.c
index b5ceabf1..9f8823e7 100644
--- a/tests/prime_nv_pcopy.c
+++ b/tests/prime_nv_pcopy.c
@@ -81,8 +81,8 @@ static void nv_bo_alloc(struct nouveau_bo **bo, rect *r,
memtype = memtype_intel;
tile_y += ((tile_mode & 0xf0)>>4);
- dx = 1 << tile_x;
- dy = 1 << tile_y;
+ dx = BIT(tile_x);
+ dy = BIT(tile_y);
igt_debug("Tiling requirements: x y %u %u\n", dx, dy);
}
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 5f8a4dd5..c21b8703 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -297,7 +297,7 @@ static void work(int i915, int dmabuf, unsigned ring,
uint32_t flags)
store[count].delta = sizeof(uint32_t) * count;
store[count].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
store[count].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
- batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? BIT(22) : 0);
if (gen >= 8) {
batch[++i] = 0;
batch[++i] = 0;
@@ -322,11 +322,11 @@ static void work(int i915, int dmabuf, unsigned ring,
uint32_t flags)
store[count].write_domain = 0;
batch[i] = MI_BATCH_BUFFER_START;
if (gen >= 8) {
- batch[i] |= 1 << 8 | 1;
+ batch[i] |= BIT(8) | 1;
batch[++i] = 0;
batch[++i] = 0;
} else if (gen >= 6) {
- batch[i] |= 1 << 8;
+ batch[i] |= BIT(8);
batch[++i] = 0;
} else {
batch[i] |= 2 << 6;
@@ -564,7 +564,7 @@ static uint32_t set_fb_on_crtc(int fd, int pipe, struct
vgem_bo *bo, uint32_t fb
memset(&enc, 0, sizeof(enc));
enc.encoder_id = encoders[e];
drmIoctl(fd, DRM_IOCTL_MODE_GETENCODER, &enc);
- if (enc.possible_crtcs & (1 << pipe))
+ if (enc.possible_crtcs & BIT(pipe))
break;
}
if (e == conn.count_encoders)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index 946592e8..ea1e119c 100644
--- a/tests/sw_sync.c
+++ b/tests/sw_sync.c
@@ -491,7 +491,7 @@ static void test_sync_multi_timeline_wait(void)
}
#define MULTI_CONSUMER_THREADS 8
-#define MULTI_CONSUMER_ITERATIONS (1 << 14)
+#define MULTI_CONSUMER_ITERATIONS BIT(14)
static void * test_sync_multi_consumer_thread(void *arg)
{
data_t *data = arg;
@@ -572,7 +572,7 @@ static void test_sync_multi_consumer(void)
}
#define MULTI_CONSUMER_PRODUCER_THREADS 8
-#define MULTI_CONSUMER_PRODUCER_ITERATIONS (1 << 14)
+#define MULTI_CONSUMER_PRODUCER_ITERATIONS BIT(14)
static void * test_sync_multi_consumer_producer_thread(void *arg)
{
data_t *data = arg;
@@ -749,7 +749,7 @@ static int mpsc_consumer_thread(void)
*/
static void test_sync_multi_producer_single_consumer(void)
{
- int iterations = 1 << 12;
+ int iterations = BIT(12);
int n = 5;
int prod_timeline[n];
int cons_timeline;
@@ -781,7 +781,7 @@ static void test_sync_multi_producer_single_consumer(void)
static void test_sync_expired_merge(void)
{
- int iterations = 1 << 20;
+ int iterations = BIT(20);
int timeline;
int i;
int fence_expired, fence_merged;
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index a974f42b..12292334 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -495,7 +495,7 @@ int update_display(bool probe)
if (test_preferred_mode || force_mode ||
specified_mode_num != -1)
- crtc_idx_mask &= ~(1 << connector->pipe);
+ crtc_idx_mask &= ~BIT(connector->pipe);
}
}
diff --git a/tests/vgem_basic.c b/tests/vgem_basic.c
index 5b54a4a3..ec1d827d 100644
--- a/tests/vgem_basic.c
+++ b/tests/vgem_basic.c
@@ -59,14 +59,14 @@ static void test_create(int fd)
bo.height = 1024;
bo.bpp = 8;
vgem_create(fd, &bo);
- igt_assert_eq(bo.size, 1<<20);
+ igt_assert_eq(bo.size, BIT(20));
gem_close(fd, bo.handle);
- bo.width = 1<<15;
- bo.height = 1<<15;
+ bo.width = BIT(15);
+ bo.height = BIT(15);
bo.bpp = 16;
vgem_create(fd, &bo);
- igt_assert_eq(bo.size, 1<<31);
+ igt_assert_eq(bo.size, BIT(31));
gem_close(fd, bo.handle);
}
--
2.11.0
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