On Mon, Feb 06, 2017 at 12:54:39PM +0000, Matthew Auld wrote: > On 6 February 2017 at 08:45, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > > As we now mark the reserved hole (drm_mm.head_node) with the special > > UNEVICTABLE color, we can use the page coloring to avoid prefetching of > > the CS beyond the end of the GTT. > > > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > > --- > > @@ -3241,14 +3246,14 @@ int i915_ggtt_init_hw(struct drm_i915_private > > *dev_priv) > > > > INIT_LIST_HEAD(&dev_priv->vm_list); > > > > - /* Subtract the guard page before address space initialization to > > - * shrink the range used by drm_mm. > > + /* Note that we use page colouring to enforce a guard page at the > > + * end of the address space. This is required as the CS may prefetch > > + * beyond the end of the batch buffer, across the page boundary, > > + * and beyond the end of the GTT if we do provide a guard. > if we do not provide a guard? > > Reviewed-by: Matthew Auld <matthew.a...@intel.com>
Thanks for the review, and now back to the usual breaking of CI. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
