On Wed, Nov 23, 2016 at 02:27:43PM -0800, Anusha Srivatsa wrote:
> From: Peter Antoine <peter.anto...@intel.com>
>
> This patch will allow for getparams to return the status of the HuC.
> As the HuC has to be validated by the GuC this patch uses the validated
> status to show when the HuC is loaded and ready for use. You cannot use
> the loaded status as with the GuC as the HuC is verified after it is
> loaded and is not usable until it is verified.
>
> v2: removed the forewakes as the registers are already force-woken.
> (T.Ursulin)
> v4: rebased.
> v5: rebased.
> v6: rebased.
> v7: rebased.
> v8: rebased.
>
> Tested-by: Xiang Haihao <haihao.xi...@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
> Signed-off-by: Peter Antoine <peter.anto...@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> Reviewed-by: Jeff McGee <jeff.mc...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_huc.h | 1 +
> drivers/gpu/drm/i915/intel_huc_loader.c | 13 +++++++++++++
> include/uapi/drm/i915_drm.h | 1 +
> 4 files changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index b893e67..f2d5b0f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -49,6 +49,8 @@
> #include "i915_trace.h"
> #include "i915_vgpu.h"
> #include "intel_drv.h"
> +#include "intel_guc.h"
> +#include "intel_huc.h"
>
> static struct drm_driver driver;
>
> @@ -350,6 +352,9 @@ static int i915_getparam(struct drm_device *dev, void
> *data,
> */
> value = 1;
> break;
> + case I915_PARAM_HAS_HUC:
> + value = intel_is_huc_valid(dev_priv);
> + break;
> default:
> DRM_DEBUG("Unknown parameter %d\n", param->param);
> return -EINVAL;
> @@ -603,6 +608,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
> if (ret)
> goto cleanup_irq;
>
> + intel_huc_init(dev);
As we discussed, this needs to be in patch 3.
> intel_guc_init(dev);
>
> ret = i915_gem_init(dev);
> @@ -630,6 +636,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
> DRM_ERROR("failed to idle hardware; continuing to unload!\n");
> i915_gem_fini(dev_priv);
> cleanup_irq:
> + intel_huc_fini(dev);
> intel_guc_fini(dev);
> drm_irq_uninstall(dev);
> intel_teardown_gmbus(dev);
> @@ -1325,6 +1332,7 @@ void i915_driver_unload(struct drm_device *dev)
> /* Flush any outstanding unpin_work. */
> drain_workqueue(dev_priv->wq);
>
> + intel_huc_fini(dev);
> intel_guc_fini(dev);
> i915_gem_fini(dev_priv);
> intel_fbc_cleanup_cfb(dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_huc.h
> b/drivers/gpu/drm/i915/intel_huc.h
> index 3ce0299..2e150be 100644
> --- a/drivers/gpu/drm/i915/intel_huc.h
> +++ b/drivers/gpu/drm/i915/intel_huc.h
> @@ -39,4 +39,5 @@ struct intel_huc {
> void intel_huc_init(struct drm_device *dev);
> void intel_huc_fini(struct drm_device *dev);
> int intel_huc_load(struct drm_device *dev);
> +extern int intel_is_huc_valid(struct drm_i915_private *dev_priv);
> #endif
> diff --git a/drivers/gpu/drm/i915/intel_huc_loader.c
> b/drivers/gpu/drm/i915/intel_huc_loader.c
> index 3a2555e..8c3993b 100644
> --- a/drivers/gpu/drm/i915/intel_huc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_huc_loader.c
> @@ -291,3 +291,16 @@ void intel_huc_fini(struct drm_device *dev)
>
> huc_fw->fetch_status = UC_FIRMWARE_NONE;
> }
> +
> +/**
> + * intel_is_huc_valid() - Check to see if the HuC is fully loaded.
> + * @dev_priv: drm device to check.
> + *
> + * This function will return true if the guc has been loaded and
> + * has valid firmware. The simplest way of doing this is to check
> + * if the HuC has been validated, if so it must have been loaded.
> + */
> +int intel_is_huc_valid(struct drm_i915_private *dev_priv)
> +{
> + return ((I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED) != 0);
> +}
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index bdfc688..0a9dac4 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -390,6 +390,7 @@ typedef struct drm_i915_irq_wait {
> #define I915_PARAM_HAS_POOLED_EU 38
> #define I915_PARAM_MIN_EU_IN_POOL 39
> #define I915_PARAM_MMAP_GTT_VERSION 40
> +#define I915_PARAM_HAS_HUC 42
>
> /* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
> * priorities and the driver will attempt to execute batches in priority
> order.
> --
> 2.7.4
>
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