One of the memsets was added by 5a920b85f2c6 ("drm/i915/gen9: fix DDB
partitioning for multi-screen cases"), and the other was added by
01c72d6c17 ("drm/i915/gen9: fix DDB partitioning for multi-screen
cases"). I'm confused and I'll let the maintainers find out what went
wrong here.
Cc: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 88e28c9..cc9e0c0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3411,10 +3411,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe]));
- /* Clear the partitioning for disabled planes. */
- memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
- memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe]));
-
if (WARN_ON(!state))
return 0;
--
2.7.4
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