Em Qua, 2016-10-26 às 15:51 -0700, Matt Roper escreveu:
> This macro's name is a bit misleading; it doesn't actually iterate
> over
> all planes since it omits the cursor plane.  Its only uses are in
> gen9
> code which is using it to iterate over the universal planes (which we
> treat as primary+sprites); in these cases the legacy cursor registers
> are programmed independently if necessary.  The macro's iterator
> value
> (0 for primary plane, spritenum+1 for each secondary plane) also
> isn't
> meaningful outside the gen9 context where the hardware considers them
> to
> all be "universal" planes that follow this numbering.
> 
> This is just a renaming/clarification patch with no functional
> change.
> However it will make the subsequent patches more clear.

I really like the rename. Also, this seems to apply even on top of
Maarten's series. IMHO we should merge this soon, before patch 3 reach
its final form.

Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>


> 
> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c  | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h      | 2 +-
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/intel_pm.c      | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index be92efe..9f5a392 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3463,7 +3463,7 @@ static int i915_ddb_info(struct seq_file *m,
> void *unused)
>       for_each_pipe(dev_priv, pipe) {
>               seq_printf(m, "Pipe %c\n", pipe_name(pipe));
>  
> -             for_each_plane(dev_priv, pipe, plane) {
> +             for_each_universal_plane(dev_priv, pipe, plane) {
>                       entry = &ddb->plane[pipe][plane];
>                       seq_printf(m, "  Plane%-8d%8u%8u%8u\n",
> plane + 1,
>                                  entry->start, entry->end,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 55afb66..4714051 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -312,7 +312,7 @@ struct i915_hotplug {
>  #define for_each_pipe_masked(__dev_priv, __p, __mask) \
>       for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes;
> (__p)++) \
>               for_each_if ((__mask) & (1 << (__p)))
> -#define for_each_plane(__dev_priv, __pipe, __p)                      
>       \
> +#define for_each_universal_plane(__dev_priv, __pipe, __p)            
> \
>       for ((__p) = 0;                                         
>       \
>            (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] +
> 1;    \
>            (__p)++)
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 895b3dc..cb7dd11 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13485,7 +13485,7 @@ static void verify_wm_state(struct drm_crtc
> *crtc,
>       sw_ddb = &dev_priv->wm.skl_hw.ddb;
>  
>       /* planes */
> -     for_each_plane(dev_priv, pipe, plane) {
> +     for_each_universal_plane(dev_priv, pipe, plane) {
>               hw_plane_wm = &hw_wm.planes[plane];
>               sw_plane_wm = &sw_wm->planes[plane];
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 9e0e874..58d3ba0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3160,7 +3160,7 @@ void skl_ddb_get_hw_state(struct
> drm_i915_private *dev_priv,
>               if (!intel_display_power_get_if_enabled(dev_priv,
> power_domain))
>                       continue;
>  
> -             for_each_plane(dev_priv, pipe, plane) {
> +             for_each_universal_plane(dev_priv, pipe, plane) {
>                       val = I915_READ(PLANE_BUF_CFG(pipe, plane));
>                       skl_ddb_entry_init_from_hw(&ddb-
> >plane[pipe][plane],
>                                                  val);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to