On Thu, 19 Apr 2012 16:45:22 +0200, Daniel Vetter <daniel.vet...@ffwll.ch> wrote: > It looks like we also need to flush the render cache when we just > invalidate it. This fixes a regression in i-g-t/gem_tiled_blits on my > i855gm. I guess the render cache there is virtually indexed, so we > need to clean it when changing gtt mappings. > > This regression has been introduce in > > commit 46f0f8d120c4afae53a5670bf3ac80a928340ff3 > Author: Chris Wilson <ch...@chris-wilson.co.uk> > Date: Wed Apr 18 11:12:11 2012 +0100 > > drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSH > > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Signed-Off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
My fault, with hindsight comes wisdom, Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
