On Tue, 10 Apr 2012 11:52:50 +0100, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > Similar to allowing a buffer to be simultaneously read by the GPU and > through the GTT, we wish to allow readback of the pages through the CPU > domain whilst they are also being read by the GPU. Domain coherency > is managed by allowing multiple readers, but only a single writer. > > This is used by mesa for its program cache which it may search for every > new program every frame and then renews should it need to add. During > renewal, mesa copies the program bo currently executing through a CPU > mapping onto the new bo. This patch allows the search and that copy to > proceed without causing a stall on the current batch.
At Daniel's request, I added i-g-t/gem_cpu_concurrent_blit to catch the possible bugs that may have been introduced by this patch. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
