On Fri, 23 Mar 2012 23:43:36 +0100, Daniel Vetter <daniel.vet...@ffwll.ch> wrote: > Again, Valleyview modes these around, so make the mmio base more > explicit to consolidate the base address computations to one > HAS_PCH_SPLIT check. > > Signed-Off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Consolidating the offset computation is nice. Everytime I look at this I question whether we should be using GMBUS0 or a plain 0 for the actual registers. I think GMBUS0 wins for being greppable. Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
